Shashidhar Thakur

According to our database1, Shashidhar Thakur authored at least 12 papers between 1994 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
Knowledge in Search.
Proceedings of the 10th NTCIR Conference on Evaluation of Information Access Technologies, 2013

2002
Estimating routing congestion using probabilistic analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

1998
Minimum Crosstalk Vertical Layer Assignment for Three-Layer VHV Channel Routing.
VLSI Design, 1998

1997
Algorithms for an FPGA switch module routing problem with application to global routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996
Series-parallel functions and FPGA logic module design.
ACM Trans. Design Autom. Electr. Syst., 1996

Simultaneous area and delay minimum K-LUT mapping for K-exact networks.
Integr., 1996

Universal Logic Modules for Series-Parallel Functions.
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996

Delay Minimal Decomposition of Multiplexers in Technology Mapping.
Proceedings of the 33st Conference on Design Automation, 1996

1995
An Optimal Layer Assignment Algorithm for Minimizing Crosstalk for Three Layer VHV Channel Routing.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

On Designing ULM-based FPGA Logic Modules.
Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays, 1995

1994
A new global routing algorithm for FPGAs.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Algorithms for a switch module routing problem.
Proceedings of the Proceedings EURO-DAC'94, 1994


  Loading...