Shashank K. Mehta

Orcid: 0000-0003-1830-2077

According to our database1, Shashank K. Mehta authored at least 36 papers between 1990 and 2022.

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Bibliography

2022
On the bases of Z<sup>n</sup> lattice.
Proceedings of the 24th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing, 2022

2020
A completely positive formulation of the graph isomorphism problem and its positive semidefinite relaxation.
J. Comb. Optim., 2020

2019
Depth First Search in the Semi-streaming Model.
Proceedings of the 36th International Symposium on Theoretical Aspects of Computer Science, 2019

2018
The QAP-polytope and the graph isomorphism problem.
J. Comb. Optim., 2018

Maximum Distance Sub-Lattice Problem.
CoRR, 2018

2016
Partial degree bounded edge packing problem for graphs and k-uniform hypergraphs.
J. Comb. Optim., 2016

2014
A Divide and Conquer Method to Compute Binomial Ideals.
Proceedings of the LATIN 2014: Theoretical Informatics - 11th Latin American Symposium, Montevideo, Uruguay, March 31, 2014

A Geometric Approach to Graph Isomorphism.
Proceedings of the Algorithms and Computation - 25th International Symposium, 2014

2013
Completely Positive formulation of the Graph Isomorphism Problem
CoRR, 2013

Partial Degree Bounded Edge Packing Problem with Arbitrary Bounds.
Proceedings of the Frontiers in Algorithmics <i>and</i> Algorithmic Aspects in Information and Management, 2013

2011
A saturation algorithm for homogeneous binomial ideals.
ACM Commun. Comput. Algebra, 2011

2010
Generalized Reduction to Compute toric ideals.
Discret. Math. Algorithms Appl., 2010

2009
Critically indecomposable graphs.
Discret. Appl. Math., 2009

2008
Polynomial irreducibility testing through Minkowski summand computation.
Proceedings of the 20th Annual Canadian Conference on Computational Geometry, 2008

Implied Set Closure and Its Application to Memory Consistency Verification.
Proceedings of the Computer Aided Verification, 20th International Conference, 2008

2007
Symbolic Path Sensitization Analysis and Applications.
Proceedings of the 16th Asian Test Symposium, 2007

2006
Algorithms on Graphs with Small Dominating Targets.
Proceedings of the Algorithms and Computation, 17th International Symposium, 2006

On Indecomposability Preserving Elimination Sequences.
Proceedings of the Computing and Combinatorics, 12th Annual International Conference, 2006

2005
Some Algorithms on Conditionally Critical Indecomposable Graphs.
Electron. Notes Discret. Math., 2005

Domination Search on Graphs with Low Dominating-Target-Number.
Proceedings of the Graph-Theoretic Concepts in Computer Science, 2005

Conditionally Critical Indecomposable Graphs.
Proceedings of the Computing and Combinatorics, 11th Annual International Conference, 2005

2004
End-to-End Delay Heuristics for Adaptive Optical Wireless Networks.
Proceedings of the 12th International Workshop on Modeling, 2004

A nonparametric classifier for unsegmented text.
Proceedings of the Document Recognition and Retrieval XI, 2004

Broadband Optical Wireless Internet: Delay Optimization.
Proceedings of the 1st International Conference on Broadband Networks (BROADNETS 2004), 2004

2003
Modeling Fault Coverage of Random Test Patterns.
J. Electron. Test., 2003

Indirect Symbolic Correlation Approach to Unsegmented Text Recognition.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2003

2002
A Novel Method to Improve the Test Efficiency of VLSI Tests.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

2001
Design Verification and Functional Testing of FiniteState Machines.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

2000
Exploiting don't cares to enhance functional tests.
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

1999
A synthesis for testability scheme for finite state machines using clock control.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Empirical Computation of Reject Ratio in VLSI Testing.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1998
Synthesis of Sequential Circuits with Clock Control to Improve Testability.
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1997
Synthesis for Testability by Two-Clock Control.
Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

1993
An analog neural network to solve the hamiltonian cycle problem.
Neural Networks, 1993

1991
Constrained Integer Approximation to Planar Line Intersection.
Inf. Process. Lett., 1991

1990
A neural algorithm to solve the Hamiltonian cycle problem.
Proceedings of the IJCNN 1990, 1990


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