Shantanu Mehta
Orcid: 0000-0002-3541-759X
According to our database1,
Shantanu Mehta
authored at least 5 papers
between 2019 and 2021.
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Bibliography
2021
Comparison of High-Order Programmable Mismatch Shaping Bandpass DEM Implementations Applicable to Nyquist-Rate D/A Converters.
IEEE Open J. Circuits Syst., 2021
A Higher-Order Programmable Amplitude and Timing Error Shaping Bandpass DEM for Nyquist-Rate D/A Converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs.
IEEE Open J. Circuits Syst., 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
2019
A Tri-level Current-Steering DAC Design with Improved Output-Impedance Related Dynamic Performance.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019