Shantanu Gupta

Orcid: 0000-0002-9931-1612

According to our database1, Shantanu Gupta authored at least 47 papers between 2005 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
PTEN expression can be used as a switch between senescence and apoptosis in breast cancer cells according to a logical model of the G2/M checkpoint.
Biosyst., January, 2024

Automated Spoken-to-Coded Pilot Weather Reports in General Aviation.
J. Aerosp. Inf. Syst., 2024

A Unified Causal Framework for Auditing Recommender Systems for Ethical Concerns.
CoRR, 2024

Photon Inhibition for Energy-Efficient Single-Photon Imaging.
Proceedings of the Computer Vision - ECCV 2024, 2024

2023
A Boolean model of the oncogene role of FAM111B in lung adenocarcinoma.
Comput. Biol. Chem., October, 2023

Learned Causal Method Prediction.
CoRR, 2023

Local Discovery by Partitioning: Polynomial-Time Causal Discovery Around Exposure-Outcome Pairs.
CoRR, 2023

Discovering Optimal Scoring Mechanisms in Causal Strategic Prediction.
CoRR, 2023

Eulerian Single-Photon Vision.
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023

Local Causal Discovery for Estimating Causal Effects.
Proceedings of the Conference on Causal Learning and Reasoning, 2023

2022
The Wnt pathway can stabilize hybrid phenotypes in the epithelial-mesenchymal transition: A logical modeling approach.
Comput. Biol. Chem., 2022

Homophily and Incentive Effects in Use of Algorithms.
Proceedings of the 44th Annual Meeting of the Cognitive Science Society, 2022

2021
Estimating treatment effects with observed confounders and mediators.
Proceedings of the Thirty-Seventh Conference on Uncertainty in Artificial Intelligence, 2021

Efficient Online Estimation of Causal Effects by Deciding What to Observe.
Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021

Self-Synchronization Scheme for Network of Grid-following and Grid-forming Photovoltaic Inverters.
Proceedings of the IECON 2021, 2021

Correcting Exposure Bias for Link Recommendation.
Proceedings of the 38th International Conference on Machine Learning, 2021

Passive Inter-Photon Imaging.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021

2020
Quanta burst photography.
ACM Trans. Graph., 2020

2019
Towards the contribution of the p38MAPK pathway to the dual role of TGF<i>β</i> in cancer: A boolean model approach.
Comput. Biol. Medicine, 2019

2018
Fast and Generalisable License Plate Re-identification using Neural Embedding of Fisher Vectors.
Proceedings of the ICVGIP 2018: 11th Indian Conference on Computer Vision, 2018

2017
Neural Signatures for Licence Plate Re-identification.
CoRR, 2017

2013
Illusionist: Transforming lightweight cores into aggressive cores on demand.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

2011
Adaptive Architectures for Robust and Efficient Computing.
PhD thesis, 2011

StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs.
IEEE Trans. Computers, 2011

Maximizing Spare Utilization by Virtually Reorganizing Faulty Cache Lines.
IEEE Trans. Computers, 2011

Bundled execution of recurring traces for energy-efficient general purpose processing.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

Encore: low-cost, fine-grained transient fault recovery.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

Archipelago: A polymorphic cache design for enabling robust near-threshold operation.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

2010
Putting Faulty Cores to Work.
IEEE Micro, 2010

Erasing Core Boundaries for Robust and Configurable Performance.
Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

Necromancer: enhancing system throughput by animating dead cores.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

StageWeb: Interweaving pipeline stages into a wearout and variation tolerant CMP fabric.
Proceedings of the 2010 IEEE/IFIP International Conference on Dependable Systems and Networks, 2010

Shoestring: probabilistic soft error reliability on the cheap.
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010

CoreGenesis: erasing core boundaries for robust and configurable performance.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009
ZerehCache: armoring cache architectures in high defect density technologies.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Enabling ultra low voltage system operation by tolerating on-chip cache failures.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

Architectural core salvaging in a multi-core processor for hard-error tolerance.
Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

Using hardware transactional memory for data race detection.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Adaptive online testing for efficient hard fault detection.
Proceedings of the 27th International Conference on Computer Design, 2009

2008
RaceTM: detecting data races using transactional memory.
Proceedings of the SPAA 2008: Proceedings of the 20th Annual ACM Symposium on Parallelism in Algorithms and Architectures, 2008

The StageNet fabric for constructing resilient multicore systems.
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems.
Proceedings of the 2008 International Conference on Compilers, 2008

2007
Self-calibrating Online Wearout Detection.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

Open standards and accessibility to information: a critical analysis of OOXML in India.
Proceedings of the 1st International Conference on Theory and Practice of Electronic Governance, 2007

2006
Cost-efficient soft error protection for embedded microprocessors.
Proceedings of the 2006 International Conference on Compilers, 2006

2005
Flip-flop chaining architecture for power-efficient scan during test application.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005


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