Shanky Saxena
Orcid: 0000-0002-3100-6486
According to our database1,
Shanky Saxena
authored at least 4 papers
between 2015 and 2023.
Collaborative distances:
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Bibliography
2023
J. Circuits Syst. Comput., November, 2023
An Ultra-Low-Power C-Band FMCW Transmitter Using a Fast Settling Fractional-N DPLL and Ring-Based Pulse Injection Locking Oscillator.
J. Circuits Syst. Comput., February, 2023
2022
Design of Power, Area and Delay Optimized Direct Digital Synthesizer Using Modified 32-Bit Square Root Carry Select Adder.
J. Circuits Syst. Comput., 2022
2015
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015