Shane T. Fleming

Orcid: 0000-0002-3224-278X

According to our database1, Shane T. Fleming authored at least 19 papers between 2013 and 2024.

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Bibliography

2024
Honeycomb: Ordered Key-Value Store Acceleration on an FPGA-Based SmartNIC.
IEEE Trans. Computers, March, 2024

2023
POETS: An Event-driven Approach to Dissipative Particle Dynamics: Implementing a Massively Compute-intensive Problem on a Novel Hard/Software Architecture.
ACM Trans. Parallel Comput., June, 2023

2022
Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code.
IEEE Trans. Computers, 2022

2021
General hardware multicasting for fine-grained message-passing architectures.
Proceedings of the 29th Euromicro International Conference on Parallel, 2021

2020
Termination detection for fine-grained message-passing architectures.
Proceedings of the 31st IEEE International Conference on Application-specific Systems, 2020

2019
Accelerating Position-Aware Top-k ListNet for Ranking Under Custom Precision Regimes.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

EASY: Efficient Arbiter SYnthesis from Multi-threaded Code.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018
Accelerating Top-k ListNet Training for Ranking Using FPGA.
Proceedings of the International Conference on Field-Programmable Technology, 2018

Injecting FPGA Configuration Faults in Parallel.
Proceedings of the International Conference on Field-Programmable Technology, 2018

2017
Hardware Synthesis of Weakly Consistent C Concurrency.
Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

Using Runahead Execution to Hide Memory Latency in High Level Synthesis.
Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016
StitchUp: automatic control flow protection for high level synthesis circuits.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
PushPush: Seamless integration of hardware and software objects via function calls over AXI.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

System-level Linking of Synthesised Hardware and Compiled Software Using a Higher-order Type System.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Transparent linking of compiled software and synthesized hardware.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Is high level synthesis ready for business? A computational finance case study.
Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

Heterogeneous Heartbeats: A framework for dynamic management of Autonomous SoCs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013
FPGA based control for real time systems.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Hardware Acceleration of Matrix Multiplication over Small Prime Finite Fields.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013


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