Shan Shen

Orcid: 0000-0003-1383-463X

According to our database1, Shan Shen authored at least 22 papers between 2005 and 2024.

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Bibliography

2024
Ultra8T: A sub-threshold 8T SRAM with leakage detection.
Integr., 2024

SRAM-PG: Power Delivery Network Benchmarks from SRAM Circuits.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

Deep-Learning-Based Pre-Layout Parasitic Capacitance Prediction on SRAM Designs.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023
A Timing Yield Model for SRAM Cells at Sub/Near-Threshold Voltages Based on a Compact Drain Current Model.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

A Single-Ended Offset-Canceling Sense Amplifier Enabling Wide-Voltage Operations.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

Parallel Incomplete LU Factorization Based Iterative Solver for Fixed-Structure Linear Equations in Circuit Simulation.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
A Timing Yield Model for SRAM Cells in Sub/Near-threshold Voltages Based on A Compact Drain Current Model.
CoRR, 2022

2021
A Design of Timing Speculation SRAM-Based L1 Caches With PVT Autotracking Under Near-Threshold Voltages.
IEEE Trans. Very Large Scale Integr. Syst., 2021

A Spline-High Dimensional Model Representation for SRAM Yield Estimation in High Sigma and High Dimensional Scenarios.
IEEE Access, 2021

2020
TS Cache: A Fast Cache With Timing-Speculation Mechanism Under Low Supply Voltages.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Modeling and Designing of a PVT Auto-tracking Timing-speculative SRAM.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

TYMER: A Yield-based Performance Model for Timing-speculation SRAM.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Lowering the Hit Latencies of Low Voltage Caches Based on the Cross-Sensing Timing Speculation SRAM.
IEEE Access, 2019

RRS cache: a low voltage cache based on timing speculation SRAM with a reuse-aware cacheline remapping mechanism.
Proceedings of the International Symposium on Memory Systems, 2019

2018
Detecting the phase behavior on cache performance using the reuse distance vectors.
J. Syst. Archit., 2018

2012
Cortical activation during executed, imagined, observed, and passive wrist movements in healthy volunteers and stroke patients.
NeuroImage, 2012

2009
Evaluation of the effective connectivity of supplementary motor areas during motor imagery using Granger causality mapping.
NeuroImage, 2009

The functional magnetic resonance imaging (fMRI) procedure as experienced by healthy participants and stroke patients - A pilot study.
BMC Medical Imaging, 2009

2008
Detection of Infarct Lesions From Single MRI Modality Using Inconsistency Between Voxel Intensity and Spatial Location - A 3-D Automatic Approach.
IEEE Trans. Inf. Technol. Biomed., 2008

2007
Motor imagery of complex everyday movements. An fMRI study.
NeuroImage, 2007

2006
A Behavior Study of the Effects of Visual Feedback on Motor Output.
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006

2005
MRI fuzzy segmentation of brain tissue using neighborhood attraction with neural-network optimization.
IEEE Trans. Inf. Technol. Biomed., 2005


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