Shaloo Rakheja

Orcid: 0000-0001-7501-275X

According to our database1, Shaloo Rakheja authored at least 32 papers between 2011 and 2024.

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Bibliography

2024
Modeling of Content addressable memory using 2D Reconfigurable Transistors.
Proceedings of the Device Research Conference, 2024

2023
A True Random Number Generator for Probabilistic Computing using Stochastic Magnetic Actuated Random Transducer Devices.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Large-Signal Modeling of GaN HEMTs using Fermi Kinetics and Commercial Hydrodynamics Transport.
Proceedings of the Device Research Conference, 2023

2022
Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices.
IEEE Trans. Emerg. Top. Comput., 2022

A Prony-Based Curve-Fitting Method for Characterization of RF Pulses From Optoelectronic Devices.
IEEE Signal Process. Lett., 2022

Evaluating Performance of Spintronics-Based Spiking Neural Network Chips using Parallel Discrete Event Simulation.
Proceedings of the SIGSIM-PADS '22: SIGSIM Conference on Principles of Advanced Discrete Simulation, Atlanta, GA, USA, June 8, 2022

Nanoscale Devices Based on Two-dimensional and Ferroelectric Materials.
Proceedings of the Device Research Conference, 2022

Modeling of the Charge-Voltage Characteristics of AlScN/AlN/GaN Heterostructures.
Proceedings of the Device Research Conference, 2022

Trapping Phenomena in GaN HEMTs with Fe- and C-doped Buffer.
Proceedings of the Device Research Conference, 2022

2021
Modeling-based design and benchmarking of Al-rich AlGaN 3D nanosheet MOSFET and MOSHEMTs for RF Applications.
Proceedings of the Device Research Conference, 2021

Terahertz auto oscillations in non-collinear coplanar metallic antiferromagnets.
Proceedings of the Device Research Conference, 2021

2020
Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

SMART: A Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory.
IEEE Access, 2020

Design and Circuit Modeling of Graphene Plasmonic Nanoantennas.
IEEE Access, 2020

2019
Spin-Based Reconfigurable Logic for Power- and Area-Efficient Applications.
IEEE Des. Test, 2019

Spin-valley coupled caloritronics with strained honeycomb lattices.
Proceedings of the Device Research Conference, 2019

2018
Terahertz band communication using plasma wave propagation in multilayer graphene heterostructures.
IET Cyper-Phys. Syst.: Theory & Appl., 2018

A unified current-voltage and charge-voltage model of quasi-ballistic III-nitride HEMTs for RF applications.
Proceedings of the 76th Device Research Conference, 2018

Advancing hardware security using polymorphic and stochastic spin-hall effect devices.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Terahertz Band Intra-Chip Communications: Can Wireless Links Scale Modern x86 CPUs?
IEEE Access, 2017

Polymorphic spintronic logic gates for hardware security primitives - Device design and performance benchmarking.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

Communication limits of on-chip graphene plasmonic interconnects.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Performance evaluation of copper and graphene nanoribbons in 2-D NoC structures.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2016
A practical guide to solving the stochastic Landau-Lifshitz-Gilbert-Slonczewski equation for macrospin dynamics.
CoRR, 2016

2015
Fundamental limits of energy dissipation in spintronic interconnects using optical spin pumping.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

2014
BEOL Scaling Limits and Next Generation Technology Prospects.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Evaluation of the Potential Performance of Graphene Nanoribbons as On-Chip Interconnects.
Proc. IEEE, 2013

Performance modeling for interconnects for conventional and emerging switches.
Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction, 2013

2012
Interconnects for post-CMOS devices: physical limits and device and circuit implications.
PhD thesis, 2012

Interconnect analysis in spin-torque devices: Performance modeling, sptimal repeater insertion, and circuit-size limits.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

Comparison of electrical, optical and plasmonic on-chip interconnects based on delay and energy considerations.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011
Interconnection aspects of spin torque devices: Delay, energy-per-bit, and circuit size modeling.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011


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