Shailender Chaudhry

According to our database1, Shailender Chaudhry authored at least 8 papers between 1995 and 2009.

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Bibliography

2009
Rock: A High-Performance Sparc CMT Processor.
IEEE Micro, 2009

Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor.
IEEE J. Solid State Circuits, 2009

Simultaneous speculative threading: a novel pipeline architecture implemented in sun's rock processor.
Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

2008
A Third-Generation 65nm 16-Core 32-Thread Plus 32-Scout-Thread CMT SPARC® Processor.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2005
High-Performance Throughput Computing.
IEEE Micro, 2005

2000
The MAJC Architecture: A Synthesis of Parallelism and Scalability.
IEEE Micro, 2000

1997
Time dependent priority scheduling for guaranteed QoS systems.
Proceedings of the International Conference On Computer Communications and Networks (ICCCN 1997), 1997

1995
On guaranteed bandwidth channels.
Proceedings of the 1995 International Conference on Network Protocols, 1995


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