Shahin Toutounchi

According to our database, Shahin Toutounchi authored at least 4 papers between 2002 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Cell-Aware ATPG to Improve Defect Coverage for FPGA IPs and Next Generation Zynq® MPSoCs.

Seetal Potluri, Aaron Mathew, Rambabu Nerukonda, Ismed Hartanto, Shahin Toutounchi

Proceedings of the 26th IEEE Asian Test Symposium, 2017

2004

FPGA Bridging Fault Detection and Location via Differential I{DDQ}.

Erik Chmelar, Shahin Toutounchi

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

2002

FPGA Test and Coverage.

Shahin Toutounchi, Andrew Lai

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Fault Grading FPGA Interconnect Test Configurations.

Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002