Shahin Nazarian
According to our database1,
Shahin Nazarian
authored at least 99 papers
between 2002 and 2024.
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Bibliography
2024
CoRR, 2024
Unlocking Deep Learning: A BP-Free Approach for Parallel Block-Wise Training of Neural Networks.
Proceedings of the IEEE International Conference on Acoustics, 2024
2023
CoRR, 2023
Leader-Follower Neural Networks with Local Error Signals Inspired by Complex Collectives.
CoRR, 2023
2022
ACM Trans. Design Autom. Electr. Syst., 2022
CoRR, 2022
Proceedings of the Conference on Lifelong Learning Agents, 2022
2021
IEEE Trans. Computers, 2021
A Distributed Graph-Theoretic Framework for Automatic Parallelization in Multi-core Systems.
Proceedings of the Fourth Conference on Machine Learning and Systems, 2021
Proceedings of the IEEE Intelligent Vehicles Symposium, 2021
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Proceedings of the 2021 IEEE International Conference on Big Data (Big Data), 2021
Proceedings of the AAMAS '21: 20th International Conference on Autonomous Agents and Multiagent Systems, 2021
2020
H₂O-Cloud: A Resource and Quality of Service-Aware Task Scheduling Framework for Warehouse-Scale Data Centers.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Frontiers Artif. Intell., 2020
A Vertex Cut based Framework for Load Balancing and Parallelism Optimization in Multi-core Systems.
CoRR, 2020
Proceedings of the WWW '20: The Web Conference 2020, Taipei, Taiwan, April 20-24, 2020, 2020
Proceedings of the VLSI-SoC: Design Trends, 2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020
Efficient Training of Deep Convolutional Neural Networks by Augmentation in Embedding Space.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020
Deep-PowerX: a deep learning-based framework for low-power approximate logic synthesis.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
S4oC: A Self-Optimizing, Self-Adapting Secure System-on-Chip Design Framework to Tackle Unknown Threats - A Network Theoretic, Learning Approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
Self-Optimizing and Self-Programming Computing Systems: A Combined Compiler, Complex Networks, and Machine Learning Approach.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Hybrid Cell Assignment and Sizing for Power, Area, Delay-Product Optimization of SRAM Arrays.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Normalization and dropout for stochastic computing-based deep convolutional neural networks.
Integr., 2019
H2O-Cloud: A Resource and Quality of Service-Aware Task Scheduling Framework for Warehouse-Scale Data Centers.
CoRR, 2019
CSrram: Area-Efficient Low-Power Ex-Situ Training Framework for Memristive Neuromorphic Circuits Based on Clustered Sparsity.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
kNN-CAM: A k-Nearest Neighbors-based Configurable Approximate Floating Point Multiplier.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
VeriSFQ: A Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
Approximate Logic Synthesis: A Reinforcement Learning-Based Technology Mapping Approach.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
CSM-NN: Current Source Model Based Logic Circuit Simulation - A Neural Network Approach.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
A Hybrid Framework for Functional Verification using Reinforcement Learning and Deep Learning.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Deep Learning-Based Circuit Recognition Using Sparse Mapping and Level-Dependent Decaying Sum Circuit Representations.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Taming extreme heterogeneity via machine learning based design of autonomous manycore systems.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
2018
An Exploration of Applying Gate-Length-Biasing Techniques to Deeply-Scaled FinFETs Operating in Multiple Voltage Regimes.
IEEE Trans. Emerg. Top. Comput., 2018
SpRRAM: A Predefined Sparsity Based Memristive Neuromorphic Circuit for Low Power Application.
CoRR, 2018
High performance training of deep neural networks using pipelined hardware acceleration and distributed memory.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Accelerating Coverage Directed Test Generation for Functional Verification: A Neural Network-based Framework.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
Prediction-based fast thermoelectric generator reconfiguration for energy harvesting from vehicle radiators.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Prometheus: Processing-in-memory heterogeneous architecture design from a multi-layer network theoretic strategy.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
DRL-cloud: Deep reinforcement learning-based resource provisioning and task scheduling for cloud service providers.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Fundamental Challenges Toward Making the IoT a Reachable Reality: A Model-Centric Investigation.
ACM Trans. Design Autom. Electr. Syst., 2017
ACM Trans. Design Autom. Electr. Syst., 2017
Optimal Control of PEVs with a Charging Aggregator Considering Regulation Service Provisioning.
ACM Trans. Cyber Phys. Syst., 2017
CTS2M: concurrent task scheduling and storage management for residential energy consumers under dynamic energy pricing.
IET Cyper-Phys. Syst.: Theory & Appl., 2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
A load balancing inspired optimization framework for exascale multicore systems: A complex networks approach.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Deadline-Aware Joint Optimization of Sleep Transistor and Supply Voltage for FinFET Based Embedded Systems.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
High-performance FPGA implementation of equivariant adaptive separation via independence algorithm for Independent Component Analysis.
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017
2016
Standard cell library based layout characterization and power analysis for 10nm gate-all-around (GAA) transistors.
Proceedings of the 29th IEEE International System-on-Chip Conference, 2016
Negotiation-based resource provisioning and task scheduling algorithm for cloud systems.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
Optimal co-scheduling of HVAC control and battery management for energy-efficient buildings considering state-of-health degradation.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016
2015
Design and optimization of a reconfigurable power delivery network for large-area, DVS-enabled OLED displays.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Layout Characterization and Power Density Analysis for Shorted-Gate and Independent-Gate 7nm FinFET Standard Cells.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Leakage power reduction for deeply-scaled FinFET circuits operating in multiple voltage regimes using fine-grained gate-length biasing technique.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Optimal control of PEVs for energy cost minimization and frequency regulation in the smart grid accounting for battery state-of-health degradation.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Reinforcement learning-based control of residential energy storage systems for electric bill minimization.
Proceedings of the 12th Annual IEEE Consumer Communications and Networking Conference, 2015
Negotiation-based task scheduling and storage control algorithm to minimize user's electric bills under dynamic prices.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Negotiation-based task scheduling to minimize user's electricity bills under dynamic energy prices.
Proceedings of the IEEE Online Conference on Green Communications, 2014
An improved logical effort model and framework applied to optimal sizing of circuits operating in multiple supply voltage regimes.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
An efficient semi-analytical current source model for FinFET devices in near/sub-threshold regime considering multiple input switching and stack effect.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Proceedings of the IEEE PES Innovative Smart Grid Technologies Conference, 2014
7nm FinFET standard cell layout characterization and power density prediction in near- and super-threshold voltage regimes.
Proceedings of the International Green Computing Conference, 2014
Energy optimal sizing of FinFET standard cells operating in multiple voltage regimes using adaptive independent gate control.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
Semi-analytical current source modeling of FinFET devices operating in near/sub-threshold regime with independent gate control and considering process variation.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
A nested game-based optimization framework for electricity retailers in the smart grid with residential users and PEVs.
Proceedings of the IEEE Online Conference on Green Communications, OnlineGreenComm 2013, 2013
A game-theoretic price determination algorithm for utility companies serving a community in smart grid.
Proceedings of the IEEE PES Innovative Smart Grid Technologies Conference, 2013
Semi-analytical current source modeling of near-threshold operating logic cells considering process variations.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
2012
Profit maximization for utility companies in an oligopolistic energy market with dynamic prices.
Proceedings of the IEEE Online Conference on Green Communications, 2012
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
Concurrent optimization of consumer's electrical energy bill and producer's power generation cost under a dynamic pricing model.
Proceedings of the IEEE PES Innovative Smart Grid Technologies Conference, 2012
2011
Accurate Timing and Noise Analysis of Combinational and Sequential Logic Cells Using Current Source Modeling.
IEEE Trans. Very Large Scale Integr. Syst., 2011
2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
2007
A Current-based Method for Short Circuit Power Calculation under Noisy Input Waveforms.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
Proc. IEEE, 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 2005 Design, 2005
2004
Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004
2003
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003
2002
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002