Sezer Gören

According to our database, Sezer Gören authored at least 51 papers between 1999 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Facial Expression Recognition with Quarantine Face Masks Using a Synthetic Dataset Generator.

Yücel Çelik, Sezer Gören

Proceedings of the 3rd International Conference on Image Processing and Vision Engineering, 2023

2022

Physical activity forecasting with time series data using Android smartphone.

Emre Çiçek, Sezer Gören, Gokhan Memik

Pervasive Mob. Comput., 2022

Design Principles for Interoperability of Private Blockchains.

Suha Bayraktar, Sezer Gören

Proceedings of the International Conference on Deep Learning, 2022

2021

Smartphone power management based on ConvLSTM model.

Emre Çiçek, Sezer Gören

Neural Comput. Appl., 2021

Fully automated roadside parking spot detection in real time with deep learning.

Emre Çiçek, Sezer Gören

Concurr. Comput. Pract. Exp., 2021

2019

Tools and Techniques for Implementation of Real-time Video Processing Algorithms.

Vecdi Emre Levent, Aydin Emre Guzel, Mustafa Tosun, Mert Büyükmihçi, Furkan Aydin, Sezer Gören, Cengiz Erbas, Toygar Akgün, H. Fatih Ugurdag

J. Signal Process. Syst., 2019

Lossless Look-Up Table Compression for Hardware Implementation of Transcendental Functions.

Y. Serhan Gener, Sezer Gören, H. Fatih Ugurdag

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Semi- and Fully-Random Access LUTs for Smooth Functions.

Y. Serhan Gener, Furkan Aydin, Sezer Gören, H. Fatih Ugurdag

Proceedings of the VLSI-SoC: New Technology Enabler, 2019

On-Street Parking Spot Detection for Smart Cities.

Sezer Gören, Dilan Fatma Óncevarlk, Kemal Doruk Yldz, Taha Zahit Hakyemez

Proceedings of the 2019 IEEE International Smart Cities Conference, 2019

Indoor Mapping and Positioning using Augmented Reality.

Ibrahim Alper Koc, Tacha Serif, Sezer Gören, George Ghinea

Proceedings of the 7th International Conference on Future Internet of Things and Cloud, 2019

Fast and Efficient Implementation of Lightweight Crypto Algorithm PRESENT on FPGA through Processor Instruction Set Extension.

Abdullah Varici, Gurol Saglam, Seckin Ipek, Abdullah Yildiz, Sezer Gören, Aydin Aysu, Deniz Iskender, T. Baris Aktemur, H. Fatih Ugurdag

Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

2018

Highly accurate and sensitive short read aligner.

Mehmet Yagmur Gök, Sezer Gören Ugurdag, Cem Ünsalan, Mahmut Samil Sagiroglu

Turkish J. Electr. Eng. Comput. Sci., 2018

Precise Vehicle Positioning for Indoor Navigation via OpenXC.

Yusuf Turk, Baturay Ozcan, Sezer Gören

Proceedings of the 4th International Conference on Vehicle Technology and Intelligent Transport Systems, 2018

Development of a Mobile News Reader Application Compatible with In-Vehicle Infotainment.

Basak Kurt, Sezer Gören

Proceedings of the Mobile Web and Intelligent Information Systems, 2018

Improving Driver Behavior Using Gamification.

Simge Helvaci, Aras Senova, Gorkem Kar, Sezer Gören

Proceedings of the Mobile Web and Intelligent Information Systems, 2018

2017

Hardware Division by Small Integer Constants.

H. Fatih Ugurdag, Florent de Dinechin, Y. Serhan Gener, Sezer Gören, Laurent-Stéphane Didier

IEEE Trans. Computers, 2017

Fast Multiplier Generator for FPGAs with LUT based Partial Product Generation and Column/row Compression.

Ahmet Kakacak, Aydin Emre Guzel, Ozan Cihangir, Sezer Gören, H. Fatih Ugurdag

Integr., 2017

2016

Erratum to: Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection.

Sezer Gören, Cemil Cem Gürsoy, Abdullah Yildiz

J. Electron. Test., 2016

Output Domain Downscaler.

Mert Büyükmihçi, Vecdi Emre Levent, Aydin Emre Guzel, Özgür Ates, Mustafa Tosun, Toygar Akgün, Cengiz Erbas, Sezer Gören, Hasan Fatih Ugurdag

Proceedings of the Computer and Information Sciences - 31st International Symposium, 2016

On optimization of multi-cycle tests for test quality and application time.

Cemil Cem Gürsoy, Abdullah Yildiz, Sezer Gören

Proceedings of the 2016 IEEE East-West Design & Test Symposium, 2016

Efficient Combinational Circuits for Division by Small Integer Constants.

H. Fatih Ugurdag, Anil Bayram, Vecdi Emre Levent, Sezer Gören

Proceedings of the 23nd IEEE Symposium on Computer Arithmetic, 2016

2015

Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault Injection.

Sezer Gören, Cemil Cem Gürsoy, Abdullah Yildiz

J. Electron. Test., 2015

Field programmable gate arrays implementation of Dual Tree Complex Wavelet Transform.

Ferhat Canbay, Vecdi Emre Levent, Gorkem Serbes, Sezer Gören, Nizamettin Aydin

Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

An area efficient real time implementation of dual tree complex wavelet transform in field programmable gate arrays.

Ferhat Canbay, Vecdi Emre Levent, Gorkem Serbes, H. Fatih Ugurdag, Sezer Gören, Nizamettin Aydin

Proceedings of the 15th IEEE International Conference on Bioinformatics and Bioengineering, 2015

2014

Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers.

Bilgiday Yuce, H. Fatih Ugurdag, Sezer Gören, Günhan Dündar

IEEE Trans. Computers, 2014

Real Time Wireless Packet Monitoring with Raspberry Pi Sniffer.

Yusuf Turk, Onur Demir, Sezer Gören

Proceedings of the Information Sciences and Systems 2014, 2014

Fault attack on AES via hardware Trojan insertion by dynamic partial reconfiguration of FPGA over ethernet.

Anju P. Johnson, Sayandeep Saha, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay, Sezer Gören

Proceedings of the 9th Workshop on Embedded Systems Security, 2014

2013

Partial bitstream protection for low-cost FPGAs with physical unclonable function, obfuscation, and dynamic partial self reconfiguration.

Sezer Gören, Ozgur Ozkurt, Abdullah Yildiz, H. Fatih Ugurdag, Rajat Subhra Chakraborty, Debdeep Mukhopadhyay

Comput. Electr. Eng., 2013

Generating fast logic circuits for m-select n-port Round Robin Arbitration.

H. Fatih Ugurdag, Fatih Temizkan, Sezer Gören

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Embedded tutorials: Embedded tutorial 1: Cell-aware test-from gates to transistors.

Janusz Rajski, Miodrag Potkonjak, Adit D. Singh, Abhijit Chatterjee, Zain Navabi, Matthew R. Guthaus, Sezer Gören

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Programmable Hardware Based Short Read Aligner Using Phred Quality Scores.

Mehmet Yagmur Gök, Mahmut Samil Sagiroglu, Cem Ünsalan, Sezer Gören

Proceedings of the International Conference on Social Computing, SocialCom 2013, 2013

Reconfigurable hardware-based genome aligner using quality scores.

Mehmet Yagmur Gök, Mahmut Samil Sagiroglu, Cem Ünsalan, Sezer Gören

Proceedings of the 21st Signal Processing and Communications Applications Conference, 2013

Enabling difference-based dynamic partial self reconfiguration for large differences.

Sezer Gören, Ozgur Ozkurt, Yusuf Turk, Abdullah Yildiz, H. Fatih Ugurdag

Proceedings of the 8th International Design and Test Symposium, 2013

Achieving modular dynamic partial reconfiguration with a difference-based flow (abstract only).

Sezer Gören, Yusuf Turk, Ozgur Ozkurt, Abdullah Yildiz, H. Fatih Ugurdag

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

A Fast Circuit Topology for Finding the Maximum of N k-bit Numbers.

Bilgiday Yuce, H. Fatih Ugurdag, Sezer Gören, Günhan Dündar

Proceedings of the 21st IEEE Symposium on Computer Arithmetic, 2013

2012

Ultra-fast curve fitting for pulses on FPGA.

Ali Basaran, H. Fatih Ugurdag, Taylan Akdogan, V. Ugur Güney, Sezer Gören

Proceedings of the 20th Signal Processing and Communications Applications Conference, 2012

FPGA Based Particle Identification in High Energy Physics Experiments.

H. Fatih Ugurdag, Ali Basaran, Taylan Akdogan, V. Ugur Güney, Sezer Gören

Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012

2011

Defect-Aware Nanocrossbar Logic Mapping through Matrix Canonization Using Two-Dimensional Radix Sort.

Sezer Gören, H. Fatih Ugurdag, Okan Palaz

ACM J. Emerg. Technol. Comput. Syst., 2011

FPGA bitstream protection with PUFs, obfuscation, and multi-boot.

Sezer Gören, Ozgur Ozkurt, Abdullah Yildiz, H. Fatih Ugurdag

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

2010

Gravitational pose estimation.

H. Fatih Ugurdag, Sezer Gören, Ferhat Canbay

Comput. Electr. Eng., 2010

Defect-Tolerant Logic Mapping for Nanocrossbars Based on Two-Dimensional Sort.

Sezer Gören, H. Fatih Ugurdag, Okan Palaz

Proceedings of the Computer and Information Sciences, 2010

FPGA design security with time division multiplexed PUFs.

Sezer Gören, H. Fatih Ugurdag, Abdullah Yildiz, Ozgur Ozkurt

Proceedings of the 2010 International Conference on High Performance Computing & Simulation, 2010

Defect-aware nanocrossbar logic mapping using Bipartite Subgraph Isomorphism & canonization.

Sezer Gören, H. Fatih Ugurdag, Okan Palaz

Proceedings of the 15th European Test Symposium, 2010

2009

Optimization of Embedded Controllers Based on Redundant Transition Removal and Fault Simulation Using k-WISE Tests.

Sezer Gören

J. Circuits Syst. Comput., 2009

2007

On state reduction of incompletely specified finite state machines.

Sezer Gören, F. Joel Ferguson

Comput. Electr. Eng., 2007

2006

Test sequence generation for controller verification and test with high coverage.

Sezer Gören, F. Joel Ferguson

ACM Trans. Design Autom. Electr. Syst., 2006

Population-Based FPGA Solution to Mastermind Game.

H. Fatih Ugurdag, Yahya Sahin, Onur Baskirt, Soner Dedeoglu, Sezer Gören, Yasar S. Kocak

Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), 2006

2002

Testing Finite State Machines Based on a Structural Coverage Metric .

Sezer Gören, F. Joel Ferguson

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

CHESMIN: A Heuristic for State Reduction in Incompletely Specified Finite State Machines.

Sezer Gören, F. Joel Ferguson

Proceedings of the 2002 Design, 2002

1999

Checking sequence generation for asynchronous sequential elements.

Sezer Gören, F. Joel Ferguson

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Reducing Compilation Time of Zhong's FPGA-Based SAT Solver.

Pak K. Chan, Mark J. Boyd, Sezer Gören, K. Klenk, V. Kodavati, R. Kundu, M. Margolese, J. Sun, Katsuharu Suzuki, E. Thorne, X. Wang, J. Xu, M. Zhu

Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999