Seyyed Hasan Mozafari
Orcid: 0000-0002-0360-1747Affiliations:
- McGill University, Montreal, Quebec, Canada
According to our database1,
Seyyed Hasan Mozafari
authored at least 18 papers
between 2015 and 2024.
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
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Bibliography
2024
CoRR, 2024
CoRR, 2024
Intermediate Layer Distillation with the Reused Teacher Classifier: A Study on the Importance of the Classifier of Attention-based Models.
Proceedings of the Findings of the Association for Computational Linguistics: EMNLP 2024, 2024
2023
J. Signal Process. Syst., July, 2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
High-Throughput Edge Inference for BERT Models via Neural Architecture Search and Pipeline.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
Efficient 1D Grouped Convolution for PyTorch a Case Study: Fast On-Device Fine-Tuning for SqueezeBERT.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
2022
BERTPerf: Inference Latency Predictor for BERT on ARM big.LITTLE Multi-Core Processors.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2022
Work-in-Progress: Utilizing latency and accuracy predictors for efficient hardware-aware NAS.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022
2021
Implementing Convolutional Neural Networks Using Hartley Stochastic Computing With Adaptive Rate Feature Map Compression.
IEEE Open J. Circuits Syst., 2021
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021
2020
Hot sparing for lifetime-chip-performance and cost improvement in application specific SIMT processors.
Des. Autom. Embed. Syst., 2020
2019
Characterizing the Effectiveness of Hot Sparing on Cost and Performance-per-Watt in Application Specific SIMT.
Integr., 2019
2018
IEEE Trans. Emerg. Top. Comput., 2018
2017
Area, Throughput, and Power Trade-Offs for FPGA- and ASIC-Based Execution Stream Compression.
ACM Trans. Embed. Comput. Syst., 2017
2015
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015