Seyyed Hasan Mozafari

According to our database, Seyyed Hasan Mozafari authored at least 16 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Faster Inference of Integer SWIN Transformer by Removing the GELU Activation.

Mohammadreza Tayaranian, Seyyed Hasan Mozafari, James J. Clark, Brett H. Meyer, Warren J. Gross

CoRR, 2024

2023

PipeBERT: High-throughput BERT Inference for ARM Big.LITTLE Multi-core Processors.

Hung-Yang Chang, Seyyed Hasan Mozafari, Cheng Chen, James J. Clark, Brett H. Meyer, Warren J. Gross

J. Signal Process. Syst., July, 2023

Training Acceleration of Frequency Domain CNNs Using Activation Compression.

Seyyed Hasan Mozafari, James J. Clark, Warren J. Gross, Brett H. Meyer

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

High-Throughput Edge Inference for BERT Models via Neural Architecture Search and Pipeline.

Hung-Yang Chang, Seyyed Hasan Mozafari, James J. Clark, Brett H. Meyer, Warren J. Gross

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Efficient 1D Grouped Convolution for PyTorch a Case Study: Fast On-Device Fine-Tuning for SqueezeBERT.

Seyyed Hasan Mozafari, James J. Clark, Warren J. Gross, Brett H. Meyer

Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023

2022

BERTPerf: Inference Latency Predictor for BERT on ARM big.LITTLE Multi-Core Processors.

M. Abdelgawad, Seyyed Hasan Mozafari, James J. Clark, Brett H. Meyer, Warren J. Gross

Proceedings of the IEEE Workshop on Signal Processing Systems, 2022

Work-in-Progress: Utilizing latency and accuracy predictors for efficient hardware-aware NAS.

Negin Firouzian, Seyyed Hasan Mozafari, James J. Clark, Warren J. Gross, Brett H. Meyer

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2022

Fast Heterogeneous Task Mapping for Reducing Edge DNN Latency.

Murray L. Kornelsen, Seyyed Hasan Mozafari, James J. Clark, Brett H. Meyer, Warren J. Gross

Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022

2021

Implementing Convolutional Neural Networks Using Hartley Stochastic Computing With Adaptive Rate Feature Map Compression.

Seyyed Hasan Mozafari, James J. Clark, Warren J. Gross, Brett H. Meyer

IEEE Open J. Circuits Syst., 2021

Hartley Stochastic Computing For Convolutional Neural Networks.

Seyyed Hasan Mozafari, James J. Clark, Warren J. Gross, Brett H. Meyer

Proceedings of the IEEE Workshop on Signal Processing Systems, 2021

2020

Hot sparing for lifetime-chip-performance and cost improvement in application specific SIMT processors.

Seyyed Hasan Mozafari, Brett H. Meyer

Des. Autom. Embed. Syst., 2020

2019

Characterizing the Effectiveness of Hot Sparing on Cost and Performance-per-Watt in Application Specific SIMT.

Seyyed Hasan Mozafari, Brett H. Meyer

Integr., 2019

2018

Efficient Performance Evaluation of Multi-Core SIMT Processors with Hot Redundancy.

Seyyed Hasan Mozafari, Brett H. Meyer

IEEE Trans. Emerg. Top. Comput., 2018

2017

Area, Throughput, and Power Trade-Offs for FPGA- and ASIC-Based Execution Stream Compression.

Maria Isabel Mera, Jonah Caplan, Seyyed Hasan Mozafari, Brett H. Meyer, Peter A. Milder

ACM Trans. Embed. Comput. Syst., 2017

2015

Yield-aware Performance-Cost Characterization for Multi-Core SIMT.

Seyyed Hasan Mozafari, Brett H. Meyer, Kevin Skadron

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

Hot spare components for performance-cost improvement in multi-core SIMT.

Seyyed Hasan Mozafari, Brett H. Meyer

Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015