Seyyed Ahmad Razavi

According to our database1, Seyyed Ahmad Razavi authored at least 8 papers between 2009 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2022
On Exploiting Patterns For Robust FPGA-based Multi-accelerator Edge Computing Systems.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2019
Communication-Computation co-Design of Decentralized Task Chain in CPS Applications.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Resource-Aware Decentralization of a UKF-Based Cooperative Localization for Networked Mobile Robots.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

2013
Improving bitstream compression by modifying FPGA architecture.
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

2011
TSV reduction in homogeneous 3D FPGAs by logic resource and input pad replication.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010
Reduction of process variation effect on FPGAs using multiple configurations.
Proceedings of the 18th IEEE/IFIP VLSI-SoC 2010, 2010

A Switch Box Architecture to Mitigate Bridging and Short Faults in SRAM-Based FPGAs.
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2009
A tileable switch module architecture for homogeneous 3D FPGAs.
Proceedings of the IEEE International Conference on 3D System Integration, 2009


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