Seyed Morteza Nabavinejad
Orcid: 0000-0002-5123-6318
According to our database1,
Seyed Morteza Nabavinejad
authored at least 21 papers
between 2016 and 2024.
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Bibliography
2024
FairCIM: Fair Interference Mitigation by DNN Switching for Latency-Sensitive Inference Jobs.
Proceedings of the IEEE International Conference on Autonomic Computing and Self-Organizing Systems, 2024
Proceedings of the 17th IEEE International Conference on Cloud Computing, 2024
2023
IEEE Trans. Mob. Comput., 2023
2022
IEEE Trans. Parallel Distributed Syst., 2022
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
IEEE Trans. Cloud Comput., 2021
On the Impact of Device-Level Techniques on Energy-Efficiency of Neural Network Accelerators.
CoRR, 2021
BayesTuner: Leveraging Bayesian Optimization For DNN Inference Configuration Selection.
IEEE Comput. Archit. Lett., 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
An Overview of Efficient Interconnection Networks for Deep Neural Network Accelerators.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2020
Proceedings of the 20th IEEE/ACM International Symposium on Cluster, 2020
2019
IEEE Trans. Cloud Comput., 2019
IEEE Comput. Archit. Lett., 2019
2018
MapReduce service provisioning for frequent big data jobs on clouds considering data transfers.
Comput. Electr. Eng., 2018
Data locality and VM interference aware mitigation of data skew in hadoop leveraging modern portfolio theory.
Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2016
IEEE Trans. Big Data, 2016
Energy efficiency in cloud-based MapReduce applications through better performance estimation.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016