Seyed Javad Azhari
Orcid: 0000-0001-9557-3095
According to our database1,
Seyed Javad Azhari
authored at least 32 papers
between 2000 and 2024.
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Bibliography
2024
Low-Leakage Double-Body MOSFET: A Promising Circuit-Level Technique for Deep-Submicron Analog Integrated Circuit Design.
J. Circuits Syst. Comput., 2024
2022
A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS process.
Integr., 2022
2021
An input controlled leakage restrainer transistor-based technique for leakage and short-circuit power reduction of 1-bit hybrid full adders.
Int. J. Circuit Theory Appl., 2021
A New Circuit-Level Technique for Leakage and Short-Circuit Power Reduction of Static Logic Gates in 22-nm CMOS Technology.
Circuits Syst. Signal Process., 2021
2020
Compact Design of High-Speed Low-Error Four-Quadrant Current Multiplier with Reduced Power Dissipation.
J. Circuits Syst. Comput., 2020
A high-precision current-mode multifunction analog cell suitable for computational signal processing.
Integr., 2020
2019
Integr., 2019
2018
Microelectron. J., 2018
CMOS design of computational current-mode static and dynamic functions based on analog translinear cell.
Comput. Electr. Eng., 2018
2017
Ultra low-power low-voltage FGMOS based-configurable analog block for current-mode fractional-power functions.
Microelectron. J., 2017
A low-power 6-bit MOS CML flash ADC with a novel multi-segment encoder for UWB applications.
Integr., 2017
A Novel Ultra-Low-Power, Low-Voltage, Ultra-High Output Resistance and Uniquely High Bandwidth Femto-Ampere Current Mirror.
Circuits Syst. Signal Process., 2017
2016
Circuits Syst. Signal Process., 2016
2015
A new controllable adaptive biasing linearization technique for a CMOS OTA and its application to tunable Gm-C filter design.
Microelectron. J., 2015
Analysis and Design Procedure of a Novel Low Power Highly Linear Operational Transconductance Amplifier.
J. Circuits Syst. Comput., 2015
Transconductor Linearization Based On Adaptive Biasing of Source-Degenerative MOS Transistors.
Circuits Syst. Signal Process., 2015
2013
A Low-Power Low-voltage 6-Bit 1.33 GS/S Fully MCML All NMOS Flash ADC without a Front-End T/H.
J. Circuits Syst. Comput., 2013
2012
A novel low voltage very low power CMOS class AB current output stage with ultra high output current drive capability.
Microelectron. J., 2012
Answer to Comment on "High performance low-voltage QFG-based DVCC and a novel fully differential SC integrator based on it".
IEICE Electron. Express, 2012
Circuits Syst. Signal Process., 2012
2011
Ultra low voltage, high performance operational transconductance amplifier and its application in a tunable Gm-C filter.
Microelectron. J., 2011
A novel ultra-high compliance, high output impedance low power very accurate high performance current mirror.
Microelectron. J., 2011
Low-voltage low-power rail-to-rail low-R<sub>x</sub> wideband second generation current conveyor and a single resistance-controlled oscillator based on it.
IET Circuits Devices Syst., 2011
2010
IEICE Electron. Express, 2010
Ultra low-voltage, rail-to-rail input/output stage Operational Transconductance Amplifier (OTA) with high linearity and its application in a Gm-C filter.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
A Highly Linear Operational Transconductance Amplifier (OTA) with High Common Mode Rejection Ratio.
Proceedings of the 2010 International Conference on Signal Acquisition and Processing, 2010
Proceedings of the 2010 International Conference on Signal Acquisition and Processing, 2010
2009
IEEE Trans. Instrum. Meas., 2009
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009
2008
High performance low-voltage QFG-based DVCC and a novel fully differential SC integrator based on it.
IEICE Electron. Express, 2008
2000
IEEE Trans. Instrum. Meas., 2000