Seyed Erfan Fatemieh

According to our database, Seyed Erfan Fatemieh authored at least 7 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

New design for error-resilient approximate multipliers used in image processing in CNTFET technology.

Samira Shirinabadi Farahani, Mohammad Reza Reshadinezhad, Seyed Erfan Fatemieh

J. Supercomput., February, 2024

Energy-efficient and fast IMPLY-based approximate full adder applying NAND gates for image processing.

Samane Asgari, Mohammad Reza Reshadinezhad, Seyed Erfan Fatemieh

Comput. Electr. Eng., January, 2024

Power-Area Efficient Serial IMPLY-based 4:2 Compressor Applied in Data-Intensive Applications.

Bahareh Bagheralmoosavi, Seyed Erfan Fatemieh, Mohammad Reza Reshadinezhad, Antonio Rubio

CoRR, 2024

Energy-Efficient Approximate Full Adders Applying Memristive Serial IMPLY Logic For Image Processing.

Seyed Erfan Fatemieh, Mohammad Reza Reshadinezhad

CoRR, 2024

2023

Fast and Compact Serial IMPLY-Based Approximate Full Adders Applied in Image Processing.

Seyed Erfan Fatemieh, Mohammad Reza Reshadinezhad, Nima TaheriNejad

IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

2022

Approximate In-Memory Computing using Memristive IMPLY Logic and its Application to Image Processing.

Seyed Erfan Fatemieh, Mohammad Reza Reshadinezhad, Nima TaheriNejad

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

LAHAF: Low-power, area-efficient, and high-performance approximate full adder based on static CMOS.

Seyed Erfan Fatemieh, Samira Shirinabadi Farahani, Mohammad Reza Reshadinezhad

Sustain. Comput. Informatics Syst., 2021