Seyed Erfan Fatemieh

Orcid: 0000-0002-6470-9903

According to our database1, Seyed Erfan Fatemieh authored at least 8 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
New design for error-resilient approximate multipliers used in image processing in CNTFET technology.
J. Supercomput., February, 2024

Energy-efficient and fast IMPLY-based approximate full adder applying NAND gates for image processing.
Comput. Electr. Eng., January, 2024

Energy-Efficient and Fast Memristor-based Serial Multipliers Applicable in Image Processing.
CoRR, 2024

Power-Area Efficient Serial IMPLY-based 4:2 Compressor Applied in Data-Intensive Applications.
CoRR, 2024

Energy-Efficient Approximate Full Adders Applying Memristive Serial IMPLY Logic For Image Processing.
CoRR, 2024

2023
Fast and Compact Serial IMPLY-Based Approximate Full Adders Applied in Image Processing.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023

2022
Approximate In-Memory Computing using Memristive IMPLY Logic and its Application to Image Processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
LAHAF: Low-power, area-efficient, and high-performance approximate full adder based on static CMOS.
Sustain. Comput. Informatics Syst., 2021


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