Seyed Ebrahim Esmaeili

According to our database, Seyed Ebrahim Esmaeili authored at least 12 papers between 2006 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2014

10 GHz throughput FinFET dual-edge triggered flip-flops.

Seyed Ebrahim Esmaeili, Asim J. Al-Khalili

Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

2013

Integrated Power and Clock Distribution Network.

Seyed Ebrahim Esmaeili, Asim J. Al-Khalili

IEEE Trans. Very Large Scale Integr. Syst., 2013

2012

Low-Swing Differential Conditional Capturing Flip-Flop for LC Resonant Clock Distribution Networks.

Seyed Ebrahim Esmaeili, Asim J. Al-Khalili, Glenn E. R. Cowan

IEEE Trans. Very Large Scale Integr. Syst., 2012

Dual-edge triggered sense amplifier flip-flop utilizing an improved scheme to reduce area, power, and complexity.

Seyed Ebrahim Esmaeili, Riadul Islam, Asim J. Al-Khalili, Glenn E. R. Cowan

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Clock tree structure with reduced wire length using the matched-delay skew compensation technique.

Seyed Ebrahim Esmaeili, Ali M. Farhangi, Asim J. Al-Khalili, Glenn E. R. Cowan

Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012

2011

A high performance clock precharge SEU hardened flip-flop.

Riadul Islam, Seyed Ebrahim Esmaeili, Thouhidul Islam

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010

Skew compensation in energy recovery clock distribution networks.

Seyed Ebrahim Esmaeili, Ali M. Farhangi, Asim J. Al-Khalili, Glenn E. R. Cowan

IET Comput. Digit. Tech., 2010

Dual-edge triggered sense amplifier flip-flop for resonant clock distribution networks.

Seyed Ebrahim Esmaeili, A. J. Al-Khalili, Glenn E. R. Cowan

IET Comput. Digit. Tech., 2010

Estimating required driver strength in the resonant clock generator.

Seyed Ebrahim Esmaeili, Asim J. Al-Khalili, Glenn E. R. Cowan

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009

Dual-edge triggered energy recovery DCCER flip-flop for low energy applications.

Seyed Ebrahim Esmaeili, A. J. Al-Khalili, Glenn E. R. Cowan

Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

2007

Efficiency Of Components' Region-Constrained Placement To Reduce FPGA's Dynamic Power Consumption.

Seyed Ebrahim Esmaeili, Nabil I. Khachab

Proceedings of the 14th IEEE International Conference on Electronics, 2007

2006

Effect of Glitches on the Efficiency of Components' Region-Constrained Placement as a Fast Approach to Reduce FPGA's Dynamic Power Consumption.

Seyed Ebrahim Esmaeili, Nabil I. Khachab, Moustafa Y. Ghannam

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006