Sevil Zeynep Lulec

Orcid: 0000-0002-9591-4977

According to our database1, Sevil Zeynep Lulec authored at least 5 papers between 2016 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2024
A -90-dBFS-IM<sub>3</sub>, -164-dBFS/Hz-NSD, 700-MHz-Bandwidth Continuous-Time Pipelined ADC With Digital Cancellation of DAC Errors.
IEEE J. Solid State Circuits, December, 2024

22.2 A 700MHZ-BW -164dBFS/Hz-Small-Signal-NSD 703mW Continuous-Time Pipelined ADC with On-Chip Digital Reconstruction Achieving 3 using Digital Cancellation of DAC Errors.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2021
SE5: Making a Career Choice.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019
A Third-Order Integrated Passive Switched-Capacitor Filter Obtained With a Continuous-Time Design Approach.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2016
A Simplified Model for Passive-Switched-Capacitor Filters With Complex Poles.
IEEE Trans. Circuits Syst. II Express Briefs, 2016


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