Seunghwan Cho
Orcid: 0000-0001-5373-329X
According to our database1,
Seunghwan Cho
authored at least 2 papers
between 2020 and 2021.
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Bibliography
2021
FPGA Prototyping of Systolic Array-based Accelerator for Low-Precision Inference of Deep Neural Networks.
Proceedings of the IEEE International Workshop on Rapid System Prototyping, 2021
2020
McDRAM v2: In-Dynamic Random Access Memory Systolic Array Accelerator to Address the Large Model Problem in Deep Neural Networks on the Edge.
IEEE Access, 2020