Seung Ho Shin

Orcid: 0009-0002-1153-0034

According to our database¹, Seung Ho Shin authored at least 10 papers between 2021 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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Bibliography

2024

GRAP: Efficient GPU-Based Redundancy Analysis Using Parallel Evaluation for Cross Faults.

[BibT_eX]

[DOI]

Seung Ho Shin

Hayoung Lee

Sungho Kang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024

2023

TRUST: Through-Silicon via Repair Using Switch Matrix Topology.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2023

GPU-Based Redundancy Analysis using Partitioning Method for Memory Repair.

[BibT_eX]

[DOI]

Proceedings of the 20th International SoC Design Conference, 2023

Redundancy Analysis Simplification Scheme for High-Speed Memory Repair.

[BibT_eX]

[DOI]

Proceedings of the 20th International SoC Design Conference, 2023

2022

ECMO: ECC Architecture Reusing Content-Addressable Memories for Obtaining High Reliability in DRAM.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2022

An Improved Early Termination Methodology Using Convolutional Neural Network.

[BibT_eX]

[DOI]

Proceedings of the 19th International SoC Design Conference, 2022

FAME: Fault Address Memory Structure for Repair Time Reduction.

[BibT_eX]

[DOI]

Proceedings of the 19th International SoC Design Conference, 2022

PROG: Per-Row Output Generator for BOST.

[BibT_eX]

[DOI]

Proceedings of the 19th International SoC Design Conference, 2022

2021

Post-bond Repair of Line Faults with Double-bit ECC for 3D Memory.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

An Effective Spare Allocation Methodology for 3D Memory Repair with BIRA.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

Seung Ho Shin

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