Seshasayanan Ramachandran

According to our database¹, Seshasayanan Ramachandran authored at least 3 papers between 2014 and 2015.

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2015

An optimised twin precision multiplier for ASIC environment.

[BibT_eX]

[DOI]

EURASIP J. Adv. Signal Process., 2015

2014

Power-optimized log-based image processing system.

[BibT_eX]

[DOI]

EURASIP J. Image Video Process., 2014

Area and power efficient DCT architecture for image compression.

[BibT_eX]

[DOI]

EURASIP J. Adv. Signal Process., 2014