Sergio Pernici

According to our database1, Sergio Pernici authored at least 11 papers between 1990 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

1990
1995
2000
2005
2010
2015
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1
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3
1
1
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2
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Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
A Differential Difference Amplifier with Dynamic Resistive Degeneration for MEMS microphones.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2012
Dynamic range improvement in 2<sup>nd</sup>-order low-pass multibit ΣΔ modulators.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011
1.05V 10.2mW WCDMA analog baseband in 65nm digital CMOS technology.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

2004
Fully integrated voiceband codec in a standard digital CMOS technology.
IEEE J. Solid State Circuits, 2004

2000
A 2.7-V 11.8-mW baseband ADC with 72-dB dynamic range for GSM applications.
IEEE J. Solid State Circuits, 2000

1998
A high-performance analog front-end 14-bit codec for 2.7-V digital cellular phones.
IEEE J. Solid State Circuits, 1998

1997
Low-voltage double-sampled ΣΔ converters.
IEEE J. Solid State Circuits, 1997

1994
A 5-V CMOS programmable acoustic front-end for ISDN terminals and digital telephone sets.
IEEE J. Solid State Circuits, September, 1994

1993
A CMOS low-distortion fully differential power amplifier with double nested Miller compensation.
IEEE J. Solid State Circuits, July, 1993

A CMOS fully integrated antilarsen system for digital telephones.
IEEE J. Solid State Circuits, May, 1993

1990
Analog front end of an ECBM transceiver for ISDN.
IEEE J. Solid State Circuits, December, 1990


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