Sergio de Luca

According to our database1, Sergio de Luca authored at least 14 papers between 2003 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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2020
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Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Software-Based Self-Test Techniques for Dual-Issue Embedded Processors.
IEEE Trans. Emerg. Top. Comput., 2020

Deterministic Cache-based Execution of On-line Self-Test Routines in Multi-core Automotive System-on-Chips.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
A Decentralized Scheduler for On-line Self-test Routines in Multi-core Automotive System-on-Chips.
Proceedings of the IEEE International Test Conference, 2019

Non-Intrusive Self-Test Library for Automotive Critical Applications: Constraints and Solutions.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Parallel software-based self-test suite for multi-core system-on-chip: Migration from single-core to multi-core automotive microcontrollers.
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

2017
On the in-field testing of spare modules in automotive microprocessors.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

Robustness in automotive electronics: An industrial overview of major concerns.
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

On-line software-based self-test for ECC of embedded RAM memories.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

2016
Development Flow for On-Line Core Self-Test of Automotive Microcontrollers.
IEEE Trans. Computers, 2016

In-field functional test programs development flow for embedded FPUs.
Proceedings of the 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2016

2015
Software-based self-test techniques of computational modules in dual issue embedded processors.
Proceedings of the 20th IEEE European Test Symposium, 2015

2014
On the in-field functional testing of decode units in pipelined RISC processors.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2006
Computing for LQCD: apeNEXT.
Comput. Sci. Eng., 2006

2003


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