Sergei Devadze

Christine Elizabeth Nielsen

Dmitri Mihhailov

Peeter Ellervee

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

Keynote: Cost-Efficient Reliability for Edge-AI Chips.

[BibT_eX]

[DOI]

Maksim Jenihhin

Mahdi Taheri

Natalia Cherezova

Mohammad Hasan Ahmadilivani

Rama Mounika Kodamanchili

Ahsan Rafiq

Jaan Raik

Masoud Daneshtalab

Proceedings of the 25th IEEE Latin American Test Symposium, 2024

2023

On-Chip Sensors Data Collection and Analysis for SoC Health Management.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2022

HLS-based Optimization of Tau Triggering Algorithm for LHC: a case study.

[BibT_eX]

[DOI]

CoRR, 2022

2019

Application Specific True Critical Paths Identification in Sequential Circuits.

[BibT_eX]

[DOI]

Adeboye Stephen Oyeniran

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

2018

Hierarchical Timing-Critical Paths Analysis in Sequential Circuits.

[BibT_eX]

[DOI]

Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

Parallel Critical Path Tracing Fault Simulation in Sequential Circuits.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

2017

Run-time reconfigurable instruments for advanced board-level testing.

[BibT_eX]

[DOI]

Igor Aleksejev

IEEE Instrum. Meas. Mag., 2017

Health Management for Self-Aware SoCs Based on IEEE 1687 Infrastructure.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Marginal PCB assembly defect detection on DDR3/4 memory bus.

[BibT_eX]

[DOI]

Sergei Odintsov

Proceedings of the IEEE International Test Conference, 2017

2016

Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan Architectures.

[BibT_eX]

[DOI]

J. Electron. Test., 2016

On-line fault classification and handling in IEEE1687 based fault management system for complex SoCs.

[BibT_eX]

[DOI]

Konstantin Shibin

Proceedings of the 17th Latin-American Test Symposium, 2016

A suite of IEEE 1687 benchmark networks.

[BibT_eX]

[DOI]

Farrokh Ghani Zadegan

Riccardo Cantoro

Mehrdad Montazeri

Rene Krenz-Baath

Proceedings of the 2016 IEEE International Test Conference, 2016

Designing reliable cyber-physical systems overview associated to the special session at FDL'16.

[BibT_eX]

[DOI]

Proceedings of the 2016 Forum on Specification and Design Languages, 2016

On coverage of timing related faults at board level.

[BibT_eX]

[DOI]

Igor Aleksejev

Proceedings of the 21th IEEE European Test Symposium, 2016

2015

Transition delay fault simulation with parallel critical path back-tracing and 7-valued algebra.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2015

Functional self-test of high-performance pipe-lined signal processing architectures.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2015

Virtual reconfigurable scan-chains on FPGAs for optimized board test.

[BibT_eX]

[DOI]

Proceedings of the 16th Latin-American Test Symposium, 2015

Combinational fault simulation in sequential circuits.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Fault simulation with parallel exact critical path tracing in multiple core environment.

[BibT_eX]

[DOI]

Maksim Gorev

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014

Asynchronous Fault Detection in IEEE P1687 Instrument Network.

[BibT_eX]

[DOI]

Konstantin Shibin

Proceedings of the IEEE 23rd North Atlantic Test Workshop, 2014

Critical Path Tracing Based Simulation of Transition Delay Faults.

[BibT_eX]

[DOI]

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

Design, Verification, and Application of IEEE 1687.

[BibT_eX]

[DOI]

Farrokh Ghani Zadegan

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013

Effective Scalable IEEE 1687 Instrumentation Network for Fault Management.

[BibT_eX]

[DOI]

Konstantin Shibin

IEEE Des. Test, 2013

At-speed self-testing of high-performance pipe-lined processing architectures.

[BibT_eX]

[DOI]

Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013

On in-system programming of non-volatile memories.

[BibT_eX]

[DOI]

Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013

2012

FPGA-based synthetic instrumentation for board test.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Test Conference, 2012

Embedded synthetic instruments for Board-Level testing.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE European Test Symposium, 2012

2011

Distributed Fault Simulation with Collaborative Load Balancing for VLSI Circuits.

[BibT_eX]

[DOI]

Eero Ivask

Scalable Comput. Pract. Exp., 2011

Invited paper: System-wide fault management based on IEEE P1687 IJTAG.

[BibT_eX]

[DOI]

Igor Aleksejev

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

SoC and Board Modeling for Processor-Centric Board Testing.

[BibT_eX]

[DOI]

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Automatic SoC Level Test Path Synthesis Based on Partial Functional Models.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010

Collaborative Distributed Computing in the Field of Digital Electronics Testing.

[BibT_eX]

[DOI]

Eero Ivask

Proceedings of the Balanced Automation Systems for Future Manufacturing Networks, 2010

Collaborative Distributed Fault Simulation for Digital Electronic Circuits.

[BibT_eX]

[DOI]

Eero Ivask

Proceedings of the Intelligent Distributed Computing IV - Proceedings of the 4th International Symposium on Intelligent Distributed Computing, 2010

Testing beyond the SoCs in a lego style.

[BibT_eX]

[DOI]

Anton Tsertov