Seonjin Na

According to our database, Seonjin Na authored at least 6 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs.

Yuan Feng, Seonjin Na, Hyesoon Kim, Hyeran Jeon

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management.

Seonjin Na, Jungwoo Kim, Sunho Lee, Jaehyuk Huh

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023

Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training.

Jungwoo Kim, Seonjin Na, Sanghyeon Lee, Sunho Lee, Jaehyuk Huh

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

2022

Tunable Memory Protection for Secure Neural Processing Units.

Sunho Lee, Seonjin Na, Jungwoo Kim, Jongse Park, Jaehyuk Huh

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit.

Sunho Lee, Jungwoo Kim, Seonjin Na, Jongse Park, Jaehyuk Huh

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

Common Counters: Compressed Encryption Counters for Secure GPU Memory.

Seonjin Na, Sunho Lee, Yeonjae Kim, Jongse Park, Jaehyuk Huh

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021