Seonhaeng Lee
According to our database1,
Seonhaeng Lee
authored at least 6 papers
between 2012 and 2024.
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Bibliography
2024
Cryogenic Body Bias Effect in DRAM Peripheral and Buried-Channel-Array Transistor for Quantum Computing Applications.
IEEE Access, 2024
Current-Voltage Modeling of DRAM Cell Transistor Using Genetic Algorithm and Deep Learning.
IEEE Access, 2024
2013
Effect of negative bias temperature instability induced by a low stress voltage on nanoscale high-k/metal gate pMOSFETs.
Microelectron. Reliab., 2013
2012
Channel width dependence of mechanical stress effects induced by shallow trench isolation on device performance of nanoscale nMOSFETs.
Microelectron. Reliab., 2012
Effect of electron-electron scattering at an elevated temperature on device lifetime of nanoscale nMOSFETs.
Microelectron. Reliab., 2012
Enhanced degradation of n-MOSFETs with high-k/metal gate stacks under channel hot-carrier/gate-induced drain leakage alternating stress.
Microelectron. Reliab., 2012