Seok-Yong Kang

According to our database, Seok-Yong Kang authored at least 2 papers between 2017 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

An Enhanced Built-off-Test Transceiver with Wide-range, Self-calibration Engine for 3.2 Gb/s/pin DDR4 SDRAM.

Joung-Wook Moon, Hye-Sung Yoo, Hundai Choi, Il-Won Park, Seok-Yong Kang, Jun-Bae Kim, Haeyoung Chung, Kiho Kim, Dong-Hun Lee, Ki-Jae Song, Seok-Hun Hyun, Indal Song, Young-Soo Sohn, Yong-Ho Cho, Jung-Hwan Choi, Kwang-Il Park, Seong-Jin Jang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.

Kyomin Sohn, Won-Joo Yun, Reum Oh, Chi-Sung Oh, Seong-Young Seo, Min-Sang Park, Dong-Hak Shin, Won-Chang Jung, Sang-Hoon Shin, Je-Min Ryu, Hye-Seung Yu, Jae-Hun Jung, Hyunui Lee, Seok-Yong Kang, Young-Soo Sohn, Jung-Hwan Choi, Yong-Cheol Bae, Seong-Jin Jang, Gyo-Young Jin

IEEE J. Solid State Circuits, 2017