Seok-Hoon Kim

According to our database1, Seok-Hoon Kim authored at least 16 papers between 2004 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Detecting susceptible communities and individuals in hospital contact networks: a model based on social network analysis.
Connect. Sci., December, 2023

2020
Sound learning-based event detection for acoustic surveillance sensors.
Multim. Tools Appl., 2020

2013
A Unified Graphics and Vision Processor With a 0.89 µW/fps Pose Estimation Engine for Augmented Reality.
IEEE Trans. Very Large Scale Integr. Syst., 2013

A 1 mJ/Frame Unified Media Application Processor With Dynamic Analog-Digital Mode Reconfiguration for Embedded 3D-Media Contents Processing.
IEEE J. Solid State Circuits, 2013

2012
A Mobile 3-D Display Processor With A Bandwidth-Saving Subdivider.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Homogeneous Stream Processors With Embedded Special Function Units for High-Utilization Programmable Shaders.
IEEE Trans. Very Large Scale Integr. Syst., 2012

A 1mJ/frame unified media application processor with a 179.7pJ mixed-mode feature extraction engine for embedded 3D-media contents processing.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Research on Advanced Performance Evaluation of Video Digital Contents.
Proceedings of the Convergence and Hybrid Information Technology, 2011

2010
A 116 fps/74 mW Heterogeneous 3D-Media Processor for 3-D Display Applications.
IEEE J. Solid State Circuits, 2010

A graphics and vision unified processor with 0.89µW/fps pose estimation engine for augmented reality.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A 186-Mvertices/s 161-mW Floating-Point Vertex Processor With Optimized Datapath and Vertex Caches.
IEEE Trans. Very Large Scale Integr. Syst., 2009

2008
A 36 fps SXGA 3-D Display Processor Embedding a Programmable 3-D Graphics Rendering Engine.
IEEE J. Solid State Circuits, 2008

Clipping-ratio-independent 3D graphics clipping engine by dual-thread algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
A 36fps SXGA 3D Display Processor with a Programmable 3D Graphics Rendering Engine.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

A Simultaneous View Interpolation and Multiplexing Method using Stereo Image Pairs for Lenticular Display.
Proceedings of the International Conference on Image Processing, 2007

2004
A design of digital rights management system utilizing multimedia content identifiers.
Proceedings of the IADIS International Conference WWW/Internet 2004, 2004


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