Senthil Jayapal

According to our database, Senthil Jayapal authored at least 8 papers between 2005 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Stack effect and logic restructuring on high Fan-in FinFETs logic gates.

Senthilkumar Jayapal, Janani Sainath Sigundey, Yipin Wu, EricT Tsai

Proceedings of the International Symposium on Integrated Circuits, 2016

2012

A 40 nm Dual-Width Standard Cell Library for Near/Sub-Threshold Operation.

Jun Zhou, Senthil Jayapal, Ben Busze, Li Huang, Jan Stuyt

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011

A 40 nm inverse-narrow-width-effect-aware sub-threshold standard cell library.

Jun Zhou, Senthil Jayapal, Ben Busze, Li Huang, Jan Stuyt

Proceedings of the 48th Design Automation Conference, 2011

The impact of inverse narrow width effect on sub-threshold device sizing.

Jun Zhou, Senthil Jayapal, Jan Stuyt, Jos Huisken, Harmke de Groot

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Energy efficient computation with self-adaptive single-ended body bias.

Senthil Jayapal, Jan Stuijt, Jos Huisken, Yiannos Manoli

Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

2006

Precharge Node based Variable Forward Body Bias for Low-Energy LSIs.

Senthil Jayapal, Yiannos Manoli

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

Efficiency of Leakage Reduction Techniques on Different Static Logic Styles for Embedded Portable Applications with High Standby to Active Time Ratio.

Senthilkumar Jayapal, Shanthi Sudalaiyandi, Yiannos Manoli

Proceedings of the 2005 International Symposium on System-on-Chip, 2005

Optimization of Electronic Power Consumption in Wireless Sensor Nodes.

Senthil Jayapal, S. Ramachandran, R. Bhutada, Yiannos Manoli

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005