Semiu A. Olowogemo
Orcid: 0000-0002-4788-956X
According to our database1,
Semiu A. Olowogemo
authored at least 7 papers
between 2018 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2022
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022
Model-Based Analysis of Single-Event Upset (SEU) Vulnerability of 6T SRAM Using FinFET Technologies.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2022
2021
Proceedings of the Architecture of Computing Systems - 34th International Conference, 2021
2020
Gem5Panalyzer: A Light-weight tool for Early-stage Architectural Reliability Evaluation & Prediction.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
Electrical Masking Improvement with Standard Logic Cell Synthesis Using 45 nm Technology Node.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
2019
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2018
Effects of Voltage and Temperature Variations on the Electrical Masking Capability of Sub-65 nm Combinational Logic Circuits.
Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018