Selma Saidi

Orcid: 0000-0003-3444-2520

According to our database1, Selma Saidi authored at least 48 papers between 2011 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
HLS-Based Approach for Embedded Real-Time Ray Tracing in Wireless Communications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024

Global Scheduling of Weakly-Hard Real-Time Tasks using Job-Level Priority Classes.
CoRR, 2024

Summary Paper: Use Case on Building Collaborative Safe Autonomous Systems-A Robotdog for Guiding Visually Impaired People.
CoRR, 2024

Towards Dynamic Real-Time Latency Bounds in 5G Communication.
Proceedings of the 14th IEEE International Symposium on Industrial Embedded Systems, 2024

Building Hardware Accelerators for Environmental Awareness Using Ray-Tracing.
Proceedings of the Joint European Conference on Networks and Communications & 6G Summit, 2024

Time-Bounded Throughput Guarantees Considering Channel Variations in 5G.
Proceedings of the 29th IEEE International Conference on Emerging Technologies and Factory Automation, 2024

Trace-Enabled Timing Model Synthesis for ROS2-based Autonomous Applications.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
Collective Reasoning for Safe Autonomous Systems.
CoRR, 2023

RDMA-Based Deterministic Communication Architecture for Autonomous Driving.
Proceedings of the 29th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2023

2022
Autonomous Systems Design: Charting a New Discipline.
IEEE Des. Test, 2022

Guest Editors' Introduction: Special Issue on Autonomous Systems Design.
IEEE Des. Test, 2022

Context-based Latency Guarantees Considering Channel Degradation in 5G Network Slicing.
Proceedings of the IEEE Real-Time Systems Symposium, 2022

Contract-Based Quality-of-Service Assurance in Dynamic Distributed Systems.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Providing Response Times Guarantees for Mixed-Criticality Network Slicing in 5G.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
Machine type communications: key drivers and enablers towards the 6G era.
EURASIP J. Wirel. Commun. Netw., 2021

Towards an Increased Detection Sensitivity of Time-Delay Attacks on Precision Time Protocol.
IEEE Access, 2021

The Road towards Predictable Automotive High - Performance Platforms.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Bridging the Gap between Resilient Networks-on-Chip and Real-Time Systems.
IEEE Trans. Emerg. Top. Comput., 2020

Temporal-based intrusion detection for IoV.
it Inf. Technol., 2020

EDA for Autonomous Behavior Assurance.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Building End-to-End IoT Applications with QoS Guarantees.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Code-Inherent Traffic Shaping for Hard Real-Time Systems.
ACM Trans. Embed. Comput. Syst., 2019

Future Automotive HW/SW Platform Design (Dagstuhl Seminar 19502).
Dagstuhl Reports, 2019

On Analyzing Memory Latency for Embedded CPS Platforms.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2018
Prediction of abnormal temporal behavior in real-time systems.
Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

Exploiting Locality for the Performance Analysis of Shared Memory Systems in MPSoCs.
Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

Compiler-based Extraction of Event Arrival Functions for Real-Time Systems Analysis.
Proceedings of the 30th Euromicro Conference on Real-Time Systems, 2018

Future automotive systems design: research challenges and opportunities: special session.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2018

2017
Ensuring safety and efficiency in networks-on-chip.
Integr., 2017

Designing Networks-on-Chip for High Assurance Real-Time Systems.
Proceedings of the 22nd IEEE Pacific Rim International Symposium on Dependable Computing, 2017

On the Benefits of Multicores for Real-Time Systems.
Proceedings of the Euromicro Conference on Digital System Design, 2017

2016
Supporting Suspension-based Locking Mechanisms for Real-Time Networks-on-chip.
Proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016

Safe and dynamic traffic rate control for networks-on-chips.
Proceedings of the Tenth IEEE/ACM International Symposium on Networks-on-Chip, 2016

Multi-Path Scheduling for Multimedia Traffic in Safety Critical On-chip Network.
Proceedings of the 14th ACM/IEEE Symposium on Embedded Systems for Real-Time Multimedia, 2016

Providing formal latency guarantees for ARQ-based protocols in Networks-on-Chip.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Slack-based resource arbitration for real-time Networks-on-Chip.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Dynamic admission control for real-time networks-on-chips.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Real-time DRAM throughput guarantees for latency sensitive mixed QoS MPSoCs.
Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

Dynamic Control for Mixed-Critical Networks-on-Chip.
Proceedings of the 2015 IEEE Real-Time Systems Symposium, 2015

Flexible TDM-based resource management in on-chip networks.
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015

Dynamic Detection and Mitigation of DMA Races in MPSoCs.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

The shift to multicores in real-time and safety-critical systems.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

2014
A mixed critical memory controller using bank privatization and fixed priority scheduling.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

2013
Optimizing two-dimensional DMA transfers for scratchpad Based MPSoCs platforms.
Microprocess. Microsystems, 2013

2012
Optimisation des transferts de données sur systèmes multiprocesseurs sur puce. (Optimizing Data Transfers for Multiprocessor Systems on Chips).
PhD thesis, 2012

Optimizing explicit data transfers for data parallel applications on the cell architecture.
ACM Trans. Archit. Code Optim., 2012

Optimal 2D Data Partitioning for DMA Transfers on MPSoCs.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011
Multi-criteria optimization for mapping programs to multi-processors.
Proceedings of the Industrial Embedded Systems (SIES), 2011


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