Seiichiro Yamaguchi

According to our database, Seiichiro Yamaguchi authored at least 4 papers between 1998 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions.

Chenyue Ma, Hans Jürgen Mattausch, Masataka Miyake, Takahiro Iizuka, Kazuya Matsuzawa, Seiichiro Yamaguchi, Teruhiko Hoshida, Akinori Kinoshita, Takahiko Arakawa, Jin He, Mitiko Miura-Mattausch

IEICE Trans. Electron., 2013

2009

Single-Cycle-Accessible Two-Level Caches and Compilation Technique for Energy Reducion.

Seiichiro Yamaguchi, Yuriko Ishitobi, Tohru Ishihara, Hiroto Yasuura

IPSJ Trans. Syst. LSI Des. Methodol., 2009

2008

AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications.

Tohru Ishihara, Seiichiro Yamaguchi, Yuriko Ishitobi, Tadayuki Matsumura, Yuji Kunitake, Yuichiro Oyama, Yusuke Kaneda, Masanori Muroyama, Toshinori Sato

Proceedings of the IEEE Symposium on Application Specific Processors, 2008

1998

Inverse Modeling - A Promising Approach to Know What Is Made and What Should Be Made.

Seiichiro Yamaguchi, Hiroshi Goto

Proceedings of the ASP-DAC '98, 1998