Seheon Jang
Orcid: 0000-0002-7773-7874
According to our database1,
Seheon Jang
authored at least 2 papers
in 2024.
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Bibliography
2024
A Low-Jitter and Compact-Area Fractional-N Digital PLL With Fast Multi-Variable Calibration Using the Recursive Least-Squares Algorithm.
IEEE J. Solid State Circuits, December, 2024
10.2 A 5.5μs-Calibration-Time, Low-Jitter, and Compact-Area Fractional-N Digital PLL Using the Recursive-Least-Squares (RLS) Algorithm.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024