Sébastien Thuries

According to our database, Sébastien Thuries authored at least 28 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A 450µW@50fps Wake-Up Module Featuring Auto-Bracketed 3-Scale Log-Corrected Pattern Recognition and Motion Detection in a 1.5Mpix 8T Global Shutter Imager.

Arnaud Verdant, William Guicquero, David Coriat, Guillaume Moritz, Nicolas Royer, Sébastien Thuries, Anais Mollard, Vincent Teil, Yann Desprez, Gilles Monnot, Pierre Malinge, Bruno Paille, Guillaume Caubit, Arnaud Bourge, Laurent Tardif, Stephanie Bigault, Jérôme Chossat

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2022

Introduction to the Special Issue on Monolithic 3D: Technology, Design and Computing Systems Applications Perspectives.

Sébastien Thuries, Aida Todri-Sanial

ACM J. Emerg. Technol. Comput. Syst., 2022

2021

IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management.

Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, César Fuguet Tortolero, Ivan Miro-Panades, Guillaume Moritz, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy

IEEE J. Solid State Circuits, 2021

2020

2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm² Inter-Chiplet Interconnects and 156mW/mm²@ 82%-Peak-Efficiency DC-DC Converters.

Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, Guillaume Moritz, Ivan Miro-Panades, César Fuguet Tortolero, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC.

Sébastien Thuries, Olivier Billoint, Sylvain Choisnet, Romain Lemaire, Pascal Vivet, Perrine Batude, Didier Lattard

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Test Solutions for High Density 3D-IC Interconnects - Focus on SRAM-on-Logic Partitioning.

Imed Jani, Didier Lattard, Pascal Vivet, Jean Durupt, Sébastien Thuries, Edith Beigné

Proceedings of the 24th IEEE European Test Symposium, 2019

Advanced 3D Technologies and Architectures for 3D Smart Image Sensors.

Pascal Vivet, Gilles Sicard, Laurent Millet, Stéphane Chevobbe, Karim Ben Chehida, Luis Angel Cubero, Monte Alegre, Maxence Bouvier, Alexandre Valentian, Maria Lepecq, Thomas Dombek, Olivier Bichler, Sébastien Thuries, Didier Lattard, Séverine Cheramy, Perrine Batude, Fabien Clermidy

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Merging PDKs to Build a Design Environment for 3D Circuits: Methodology, Challenges and Limitations.

Olivier Billoint, Karim Azizi-Mourier, Gerald Cibrario, Didier Lattard, Mehdi Mouhdach, Sébastien Thuries, Pascal Vivet

Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2018

Some Local Stability Properties of an Autonomous Long Short-Term Memory Neural Network Model.

Dusan M. Stipanovic, Boris Murmann, Matteo Causo, Aleksandra Lekic, Vicenc Rubies-Royo, Claire J. Tomlin, Edith Beigné, Sébastien Thuries, Mykhailo Zarudniev, Suzanne Lesecq

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit.

François Andrieu, Perrine Batude, Laurent Brunet, Claire Fenouillet-Béranger, Didier Lattard, Sébastien Thuries, Olivier Billoint, Richard Fournel, Maud Vinet

Proceedings of the 2018 International Conference on IC Design & Technology, 2018

Monolithic 3D: an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges.

Pascal Vivet, Sébastien Thuries, Olivier Billoint, Sylvain Choisnet, Didier Lattard, Edith Beigné, Perrine Batude

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits.

Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy

Microelectron. J., 2017

Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells.

Melanie Brocard, Benoît Mathieu, Jean-Philippe Colonna, Cristiano Santos, Claire Fenouillet-Béranger, Cao-Minh Vincent Lu, Gerald Cibrario, Laurent Brunet, Perrine Batude, François Andrieu, Sébastien Thuries, Olivier Billoint

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

7.5 A TCXO-less 100Hz-minimum-bandwidth transceiver for ultra-narrow-band sub-GHz IoT cellular networks.

David Lachartre, Francois Dehmas, Carolynn Bernier, Christophe Fourtet, Laurent Ouvry, Florent Lepin, Eric Mercier, Steve Hamard, Lionel Zirphile, Sébastien Thuries, Fabrice Chaix

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016

DRC²: Dynamically Reconfigurable Computing Circuit based on memory architecture.

Kaya Can Akyel, Henri-Pierre Charles, Julien Mottin, Bastien Giraud, Gregory Suraci, Sébastien Thuries, Jean-Philippe Noel

Proceedings of the IEEE International Conference on Rebooting Computing, 2016

Recent advances in 3D VLSI integration.

Claire Fenouillet-Béranger, Perrine Batude, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, M.-P. Samson, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Gerald Cibrario, Maud Vinet

Proceedings of the International Conference on IC Design and Technology, 2016

Opportunities brought by sequential 3D CoolCube™ integration.

Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, Vincent Mazzocchi, Cao-Minh Vincent Lu, Fabien Deprat, Jessy Micout, Bernard Previtali, Paul Besombes, Nils Rambal, François Andrieu, Olivier Billoint, Melanie Brocard, Sébastien Thuries, Guillaume Berhault, Cristiano Lopes Dos Santos, Gerald Cibrario, Fabien Clermidy, Daniel Gitlin, Olivier Faynot

Proceedings of the 46th European Solid-State Device Research Conference, 2016

Impact of intermediate BEOL technology on standard cell performances of 3D VLSI.

Melanie Brocard, Guillaume Berhault, Sébastien Thuries, Fabien Clermidy, Perrine Batude, Claire Fenouillet-Béranger, Laurent Brunet, François Andrieu, Fabien Deprat, Joris Lacord, Olivier Rozeau, Gerald Cibrario, Olivier Billoint

Proceedings of the 46th European Solid-State Device Research Conference, 2016

Thermal performance of CoolCube™ monolithic and TSV-based 3D integration processes.

Cristiano Santos, Pascal Vivet, Sébastien Thuries, Olivier Billoint, Jean-Philippe Colonna, Perceval Coudrain, Lee Wang

Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose.

Gerald Cibrario, Nour Ben Salem, Joris Lacord, Karim Azizi-Mourier, Olivier Rozeau, Etienne Maurin, Olivier Billoint, Sébastien Thuries, Alexandre Valentian

Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

3DIP: An iterative partitioning tool for monolithic 3D IC.

Guillaume Berhault, Melanie Brocard, Sébastien Thuries, François Galea, Lilia Zaourar

Proceedings of the 2016 IEEE International 3D Systems Integration Conference, 2016

2015

Compact interconnect approach for networks of neural cliques using 3D technology.

Bartosz Boguslawski, Hossam Sarhan, Frédéric Heitzmann, Fabrice Seguin, Sébastien Thuries, Olivier Billoint, Fabien Clermidy

Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

An Unbalanced Area Ratio Study for High Performance Monolithic 3D Integrated Circuits.

Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges.

Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, Ogun Turkyilmaz, Sébastien Thuries, Fabien Clermidy

Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool.

Olivier Billoint, Hossam Sarhan, Iyad Rayane, Maud Vinet, Perrine Batude, Claire Fenouillet-Béranger, Olivier Rozeau, Gerald Cibrario, Fabien Deprat, A. Fustier, Julien Michallet, Olivier Faynot, Ogun Turkyilmaz, Jean-Frédéric Christmann, Sébastien Thuries, Fabien Clermidy

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Intermediate BEOL process influence on power and performance for 3DVLSI.

Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Deprat, Alexandre Ayres De Sousa, Perrine Batude, Claire Fenouillet-Béranger, Fabien Clermidy

Proceedings of the 2015 International 3D Systems Integration Conference, 2015

2014

3DCoB: A new design approach for Monolithic 3D Integrated circuits.

Hossam Sarhan, Sébastien Thuries, Olivier Billoint, Fabien Clermidy

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2012

A flexible modeling environment for a NoC-based multicore architecture.

Romain Lemaire, Sébastien Thuries, Frédéric Heitzmann

Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012