Sébastien Le Beux
Orcid: 0000-0003-1778-0253
According to our database1,
Sébastien Le Beux
authored at least 80 papers
between 2006 and 2024.
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Bibliography
2024
ACM Comput. Surv., February, 2024
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024
Signed Convolution in Photonics with Phase-Change Materials using Mixed-Polarity Bitstreams.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Photonic Convolution Engine Based on Phase-Change Materials and Stochastic Computing.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
ACM Trans. Design Autom. Electr. Syst., 2022
ACM J. Emerg. Technol. Comput. Syst., 2022
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Design Space Exploration of Stochastic Computing Architectures Implemented Using Integrated Optics.
IEEE Trans. Emerg. Top. Comput., 2021
CoRR, 2021
Design of a Reconfigurable Optical Computing Architecture Using Phase Change Material.
Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021
Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021
Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021
2020
3D logic cells design and results based on Vertical NWFET technology including tied compact model.
CoRR, 2020
3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model.
Proceedings of the VLSI-SoC: Design Trends, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
Microelectron. J., 2019
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Guest Editorial: Emerging Technologies and Architectures for Manycore Computing Part 1: Hardware Techniques.
IEEE Trans. Multi Scale Comput. Syst., 2018
Towards Maximum Energy Efficiency in Nanophotonic Interconnects with Thermal-Aware On-Chip Laser Tuning.
IEEE Trans. Emerg. Top. Comput., 2018
Offline Optimization of Wavelength Allocation and Laser Power in Nanophotonic Interconnects.
ACM J. Emerg. Technol. Comput. Syst., 2018
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Energy-Efficiency Comparison of Multi-Layer Deposited Nanophotonic Crossbar Interconnects.
ACM J. Emerg. Technol. Comput. Syst., 2017
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
An Energy-Efficient Reconfigurable Nanophotonic Computing Architecture Design: Optical Lookup Table.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017
Proceedings of the IEEE International Conference on Rebooting Computing, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Energy and Performance Trade-off in Nanophotonic Interconnects using Coding Techniques.
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2016
2015
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015
Multilevel Modeling Methodology for Reconfigurable Computing Systems Based on Silicon Photonics.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
Proceedings of the 2015 Workshop on Exploiting Silicon Photonics for Energy-Efficient High Performance Computing, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
IEEE Des. Test, 2014
Concurr. Comput. Pract. Exp., 2014
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014
Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip, 2014
Introduction to the special session on "Silicon photonic interconnects: an illusion or a realistic solution?".
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
Reduction methods for adapting optical network on chip topologies to 3D architectures.
Microprocess. Microsystems, 2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the Design, Automation and Test in Europe, 2013
2012
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012
Proceedings of the 2012 IEEE/ACM International Symposium on Nanoscale Architectures, 2012
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
2011
ACM Trans. Embed. Comput. Syst., 2011
Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC).
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Using Self-Reconfiguration to Increase Manufacturing Yield of CNTFET-based Architectures.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells.
Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
J. Syst. Archit., 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009
2007
Un flot de conception pour applications de traitement du signal systématique implémentées sur FPGA à base d'Ingénierie Dirigée par les Modèles. (A Model Driven Engineering based design flow for systematic signal processing applications implemented on FPGA).
PhD thesis, 2007
Multiple Abstraction Views of FPGA to Map Parallel Applications.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
Proceedings of the FPL 2007, 2007
Proceedings of the 4th Conference on Computing Frontiers, 2007
2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006