Sebastian Steibl
According to our database1,
Sebastian Steibl
authored at least 5 papers
between 1999 and 2011.
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Bibliography
2011
A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling.
IEEE J. Solid State Circuits, 2011
2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010
2009
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009
1999
Formale Verifikation der Architekturverbesserung eines Viterbi Decoder IP Blocks.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1999