Sebastian Siegfried Prebeck

According to our database, Sebastian Siegfried Prebeck authored at least 19 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

HW-Acceleration for Edge-AI.

Sebastian Siegfried Prebeck

PhD thesis, 2024

Automated Intrinsic Support for ISA Extensions: Enhancing Software Generation for RISC-V and Beyond.

Mayuri Bhadra, Stephanie Ecker, Daniel Albert, Ravindra Ramaiah, Sebastian Prebeck, Wolfgang Ecker

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

An Automated Exhaustive Fault Analysis Technique guided by Processor Formal Verification Methods.

Endri Kaja, Nicolas Gerlin, Bihan Zhao, Daniela Sanchez Lopera, Jad Al Halabi, Azam Sher Khan, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

Special Session: A Mixed Simulation-, Emulation-, and Formal-Based Fault Analysis Methodology for RISC-V.

Endri Kaja, Nicolas Gerlin, Ares Tahiraga, Jad Al Halabi, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

An Automated and Effective Approach for SBST Generation Targeting RISC-V CPUs.

Endri Kaja, Nicolas Gerlin, Jad Al Halabi, Ares Tahiraga, Sebastian Prebeck, Dominik Stoffel, Wolfgang Kunz, Wolfgang Ecker

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024

2023

Generator IP-reuse and Automated Infrastructure Generation for Model-based Full-Chip Generation.

Johannes Schreiner, Vasundhara Raje Gontia, Sebastian Prebeck, Wolfgang Ecker

Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2023

Parallel Golomb-Rice Decoder with 8-bit Unary Decoding for Weight Compression in TinyML Applications.

Mounika Vaddeboina, Endri Kaja, Alper Yilmayer, Sebastian Prebeck, Wolfgang Ecker

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Bits, Flips and RISCs.

Nicolas Gerlin, Endri Kaja, Fabian Vargas, Li Lu, Anselm Breitenreiter, Junchao Chen, Markus Ulbricht, Maribel Gomez, Ares Tahiraga, Sebastian Prebeck, Eyck Jentzsch, Milos Krstic, Wolfgang Ecker

Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2023

G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators.

Saranyu Chattopadhyay, Keerthikumara Devarajegowda, Bihan Zhao, Florian Lonsing, Brandon A. D'Agostino, Ioanna Vavelidou, Vijay Deep Bhatt, Sebastian Prebeck, Wolfgang Ecker, Caroline Trippel, Clark W. Barrett, Subhasish Mitra

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

Early RTL delay prediction using neural networks.

Daniela Sanchez Lopera, Lorenzo Servadei, Sebastian Siegfried Prebeck, Wolfgang Ecker

Microprocess. Microsystems, October, 2022

A Smart HW-Accelerator for Non-uniform Linear Interpolation of ML-Activation Functions.

Sebastian Siegfried Prebeck, Wafic Lawand, Mounika Vaddeboina, Wolfgang Ecker

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022

A Scalable, Configurable and Programmable Vector Dot-Product Unit for Edge AI.

Sebastian Prebeck, Sathya Ashok, Mounika Vaddeboina, Keerthikumara Devarajegowda, Wolfgang Ecker

Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2022

2021

Aspect-Oriented Design Automation with Model Transformation.

Zhao Han, Deyan Wang, Gabriel Rutsch, Bowen Li, Sebastian Siegfried Prebeck, Daniela Sanchez Lopera, Keerthikumara Devarajegowda, Wolfgang Ecker

Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

Transformative Hardware Design Following the Model-Driven Architecture Vision.

Zhao Han, Gabriel Rutsch, Deyan Wang, Bowen Li, Sebastian Siegfried Prebeck, Daniela Sanchez Lopera, Keerthikumara Devarajegowda, Wolfgang Ecker

Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021

RTL Delay Prediction Using Neural Networks.

Daniela Sanchez Lopera, Lorenzo Servadei, Vishwa Priyanka Kasi, Sebastian Siegfried Prebeck, Wolfgang Ecker

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models.

Endri Kaja, Nicolas Gerlin, Mounika Vaddeboina, Luis Rivas, Sebastian Siegfried Prebeck, Zhao Han, Keerthikumara Devarajegowda, Wolfgang Ecker

Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021

ISA Modeling with Trace Notation for Context Free Property Generation.

Keerthikumara Devarajegowda, Endri Kaja, Sebastian Siegfried Prebeck, Wolfgang Ecker

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Automated HW/SW co-design for edge AI: state, challenges and steps ahead.

Oliver Bringmann, Wolfgang Ecker, Ingo Feldner, Adrian Frischknecht, Christoph Gerum, Timo Hämäläinen, Muhammad Abdullah Hanif, Michael J. Klaiber, Daniel Mueller-Gritschneder, Paul Palomero Bernardo, Sebastian Siegfried Prebeck, Muhammad Shafique

Proceedings of the CODES/ISSS 2021, 2021

2020

Optimized HW/FW Generation from an Abstract Register Interface Model.

Michael Werner, Igli Zeraliu, Zhao Han, Sebastian Siegfried Prebeck, Lorenzo Servadei, Wolfgang Ecker

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020