Sebastian Pointner

According to our database, Sebastian Pointner authored at least 8 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

An Efficient FPGA Architecture with Turn-Restricted Switch Boxes.

Fatemeh Serajeh-hassani, Mohammad Sadrosadati, Nezam Rohbani, Sebastian Pointner, Robert Wille, Hamid Sarbazi-Azad

ACM Trans. Design Autom. Electr. Syst., May, 2024

2021

SMT-Based Placement for System-on-Chip Design.

Sebastian Pointner, Sven Wenzek, Robert Wille

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020

YASSi: Yet Another Symbolic Simulator Large (Tool Demo).

Sebastian Pointner, Pablo González de Aledo, Robert Wille

Proceedings of the Database and Expert Systems Applications, 2020

2019

Did We Test Enough? Functional Coverage for Post-Silicon Validation.

Sebastian Pointner, Robert Wille

Proceedings of the IEEE International Test Conference in Asia, 2019

Focus on What is Needed: Area and Power Efficient FPGAs Using Turn-Restricted Switch Boxes.

Fatemeh Serajeh-hassani, Mohammad Sadrosadati, Sebastian Pointner, Robert Wille, Hamid Sarbazi-Azad

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Test Your Test Programs Pre-Silicon: A Virtual Test Methodology for Industrial Design Flows.

Sebastian Pointner, Oliver Frank, Christoph Hazott, Robert Wille

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Exact Stimuli Minimization for Simulation-Based Verification.

Sebastian Pointner, Andreas Grimmer, Robert Wille

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Generic Error Localization for the Electronic System Level.

Sebastian Pointner, Pablo González de Aledo, Robert Wille

Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019