Sebastian Ehrenreich

According to our database, Sebastian Ehrenreich authored at least 4 papers between 2005 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation.

Gary S. Ditlow, Robert K. Montoye, Salvatore N. Storino, Sherman M. Dance, Sebastian Ehrenreich, Bruce M. Fleischer, Thomas W. Fox, Kyle M. Holmes, Junichi Mihara, Yutaka Nakamura, Shohji Onishi, Robert Shearer, Dieter F. Wendel, Leland Chang

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2008

Implementation of the Cell Broadband Engine™ in 65 nm SOI Technology Featuring Dual Power Supply SRAM Arrays Supporting 6 GHz at 1.3 V.

Juergen Pille, Chad Adams, Todd Christensen, Scott R. Cottier, Sebastian Ehrenreich, Fumihiro Kono, Daniel Nelson, Osamu Takahashi, Shunsako Tokito, Otto A. Torreiter, Otto Wagner, Dieter F. Wendel

IEEE J. Solid State Circuits, 2008

2007

Implementation of the CELL Broadband Engine in a 65nm SOI Technology Featuring Dual-Supply SRAM Arrays Supporting 6GHz at 1.3V.

Jürgen Pille, Chad Adams, Todd Christensen, Scott R. Cottier, Sebastian Ehrenreich, Fumihiro Kono, Daniel Nelson, Osamu Takahashi, Shunsako Tokito, Otto A. Torreiter, Otto Wagner, Dieter F. Wendel

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2005

The vector fixed point unit of the synergistic processor element of the cell architecture processor.

Nicolas Mäding, Jens Leenstra, Jürgen Pille, Rolf Sautter, Stefan Büttner, Sebastian Ehrenreich, W. Haller

Proceedings of the 31st European Solid-State Circuits Conference, 2005