Sean Kinzer

Orcid: 0000-0002-0955-585X

According to our database1, Sean Kinzer authored at least 18 papers between 2018 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2025
Performance Analysis of CNN Inference/Training with Convolution and Non-Convolution Operations on ASIC Accelerators.
ACM Trans. Design Autom. Electr. Syst., 2025

2024
An Open-Source ML-Based Full-Stack Optimization Framework for Machine Learning Accelerators.
ACM Trans. Design Autom. Electr. Syst., 2024

In-Storage Domain-Specific Acceleration for Serverless Computing.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

Tandem Processor: Grappling with Emerging Operators in Neural Networks.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023
Polymorphic Compilation for Cross-Domain Acceleration
PhD thesis, 2023

Restoring the Broken Covenant Between Compilers and Deep Learning Accelerators.
CoRR, 2023

Performance Analysis of DNN Inference/Training with Convolution and non-Convolution Operations.
CoRR, 2023

Domain-Specific Computational Storage for Serverless Computing.
CoRR, 2023

MESA: Microarchitecture Extensions for Spatial Architecture Generation.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

2022
Yin-Yang: Programming Abstractions for Cross-Domain Multi-Acceleration.
IEEE Micro, 2022

Physically Accurate Learning-based Performance Prediction of Hardware-accelerated ML Algorithms.
Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 2022

Glimpse: mathematical embedding of hardware specification for neural compilation.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

A Computational Stack for Cross-Domain Acceleration.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020
Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration of Deep Neural Networks.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Mixed-Signal Charge-Domain Acceleration of Deep Neural Networks through Interleaved Bit-Partitioned Arithmetic.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019
Mixed-Signal Charge-Domain Acceleration of Deep Neural networks through Interleaved Bit-Partitioned Arithmetic.
CoRR, 2019

2018
ReLeQ: A Reinforcement Learning Approach for Deep Quantization of Neural Networks.
CoRR, 2018


  Loading...