Se-Hyun Yang
According to our database1,
Se-Hyun Yang
authored at least 12 papers
between 1999 and 2014.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2013
A 1.6 GHz quad-core application processor manufactured in 32 nm high-k metal gate process for smart mobile devices.
IEEE Commun. Mag., 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Session 10 overview: High-performance digital: High performance digital subcommittee.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2004
Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004
2003
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003
2002
Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay.
Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002
2001
IEEE Trans. Very Large Scale Integr. Syst., 2001
An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches.
Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001
2000
Gated-V<sub>dd</sub>: a circuit technique to reduce leakage in deep-submicron cache memories
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000
1999
Int. J. Uncertain. Fuzziness Knowl. Based Syst., 1999