Scott Chiu

According to our database1, Scott Chiu authored at least 9 papers between 1991 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
A Dual-Rail Hybrid Analog/Digital LDO with Dynamic Current Steering for Tunable High PSRR and High Efficiency.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2007
A 900 MHz UHF RFID Reader Transceiver IC.
IEEE J. Solid State Circuits, 2007

A 900MHz UHF RFID Reader Transceiver IC.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

1993
A Partial Scan Cost Estimation Method at the System Level.
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

1992
SYNTEST: an environment for system-level design for test.
Proceedings of the conference on European design automation, 1992

1991
SYNTEST: A Method for High-Level SYNthesis with Self-TESTability.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

A Built-In Self-Testing Approach for Minimizing Hardware Overhead.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

A Data Path Synthesis Method for Self-Testable Designs.
Proceedings of the 28th Design Automation Conference, 1991

A Design for Testability Scheme with Applications to Data Path Synthesis.
Proceedings of the 28th Design Automation Conference, 1991


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