Sayed Aresh Beheshti-Shirazi
Orcid: 0000-0003-1314-1606
According to our database1,
Sayed Aresh Beheshti-Shirazi
authored at least 4 papers
between 2021 and 2023.
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Bibliography
2023
Advanced Reinforcement Learning Solution for Clock Skew Engineering: Modified Q-Table Update Technique for Peak Current and IR Drop Minimization.
IEEE Access, 2023
2022
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
RAPTA: A Hierarchical Representation Learning Solution For Real-Time Prediction of Path-Based Static Timing Analysis.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
2021
A Reinforced Learning Solution for Clock Skew Engineering to Reduce Peak Current and IR Drop.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021