Sayed Ahmad Salehi
Orcid: 0000-0002-1755-8081
According to our database1,
Sayed Ahmad Salehi
authored at least 28 papers
between 2009 and 2024.
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Bibliography
2024
IEEE Des. Test, February, 2024
A Low-cost keyword spotting architecture based on wavelet packets feature extraction for edge device.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024
2023
AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
SCONNA: A Stochastic Computing Based Optical Accelerator for Ultra-Fast, Energy-Efficient Inference of Integer-Quantized CNNs.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023
2022
Proceedings of the 2022 International Symposium on Memory Systems, 2022
Proceedings of the International Conference on Compilers, 2022
Proceedings of the 56th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2022, Pacific Grove, CA, USA, October 31, 2022
2021
ODIN: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-Situ Neural Network Processing in Phase Change RAM.
CoRR, 2021
ATRIA: A Bit-Parallel Stochastic Arithmetic Based Accelerator for In-DRAM CNN Processing.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
Proceedings of the 7th International Conference on Automation, Robotics and Applications, 2021
2020
IEEE Trans. Very Large Scale Integr. Syst., 2020
Efficient Hardware Implementation of Discrete Wavelet Transform Based on Stochastic Computing.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
2019
Proceedings of the Unconventional Computation and Natural Computation, 2019
Proceedings of the 2019 IEEE Global Conference on Signal and Information Processing, 2019
A scalable stochastic number generator for phase change memory based in-memory stochastic processing: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
2018
An Area and Power Efficient Architecture for Linear Prediction-Error Filters Based on Split Schur Algorithm.
Proceedings of the 52nd Asilomar Conference on Signals, Systems, and Computers, 2018
2017
Computing Polynomials with Positive Coefficients using Stochastic Logic by Double-NAND Expansion.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017
2016
Proceedings of the 2016 IEEE Global Communications Conference, 2016
2015
IEEE Trans. Mol. Biol. Multi Scale Commun., 2015
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015
2014
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014
2013
Pipelined Architectures for Real-Valued FFT and Hermitian-Symmetric IFFT With Real Datapaths.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
2012
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
2009
Investigation of Lifting-Based Hardware Architectures for Discrete Wavelet Transform.
Circuits Syst. Signal Process., 2009