Sayandeep Saha
Orcid: 0000-0002-5535-1102
According to our database1,
Sayandeep Saha
authored at least 48 papers
between 2014 and 2024.
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Bibliography
2024
IEEE Trans. Computers, February, 2024
On the Instability of Softmax Attention-Based Deep Learning Models in Side-Channel Analysis.
IEEE Trans. Inf. Forensics Secur., 2024
Prime Masking vs. Faults - Exponential Security Amplification against Selected Classes of Attacks.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
Carry Your Fault: A Fault Propagation Attack on Side-Channel Protected LWE-based KEM.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024
Harmonizing PUFs for Forward Secure Authenticated Key Exchange with Symmetric Primitives.
IACR Cryptol. ePrint Arch., 2024
Authenticating Edge Neural Network through Hardware Security Modules and Quantum-Safe Key Management.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
2023
J. Cryptol., July, 2023
IACR Cryptol. ePrint Arch., 2023
CoRR, 2023
CoRR, 2023
Are Randomized Caches Truly Random? Formal Analysis of Randomized-Partitioned Caches.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
ExploreFault: Identifying Exploitable Fault Models in Block Ciphers with Reinforcement Learning.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
IACR Trans. Symmetric Cryptol., 2022
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
<i>NN-Lock</i>: A Lightweight Authorization to Prevent IP Threats of Deep Learning Models.
ACM J. Emerg. Technol. Comput. Syst., 2022
IACR Cryptol. ePrint Arch., 2022
IACR Cryptol. ePrint Arch., 2022
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the Progress in Cryptology, 2022
2021
IACR Cryptol. ePrint Arch., 2021
Shortest Path to Secured Hardware: Domain Oriented Masking with High-Level-Synthesis.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2021
Divided We Stand, United We Fall: Security Analysis of Some SCA+SIFA Countermeasures Against SCA-Enhanced Fault Template Attacks.
Proceedings of the Advances in Cryptology - ASIACRYPT 2021, 2021
2020
A Framework to Counter Statistical Ineffective Fault Analysis of Block Ciphers Using Domain Transformation and Error Correction.
IEEE Trans. Inf. Forensics Secur., 2020
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
IACR Cryptol. ePrint Arch., 2020
Proceedings of the Advances in Cryptology - EUROCRYPT 2020, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
IEEE Trans. Inf. Forensics Secur., 2019
J. Cryptogr. Eng., 2019
Breach the Gate: Exploiting Observability for Fault Template Attacks on Block Ciphers.
IACR Cryptol. ePrint Arch., 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
ExpFault: An Automated Framework for Exploitable Fault Characterization in Block Ciphers.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2018
Proceedings of the 2018 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2018
2017
An Automated Framework for Exploitable Fault Identification in Block Ciphers - A Data Mining Approach.
Proceedings of the PROOFS 2017, 2017
2016
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016
2015
Improved Test Pattern Generation for Hardware Trojan Detection using Genetic Algorithm and Boolean Satisfiability.
IACR Cryptol. ePrint Arch., 2015
2014
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014
Fault attack on AES via hardware Trojan insertion by dynamic partial reconfiguration of FPGA over ethernet.
Proceedings of the 9th Workshop on Embedded Systems Security, 2014