Saurabh Vats

According to our database1, Saurabh Vats authored at least 4 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024

2018
Clock Synchronous Reset and Skew Calibration of 65GS/s ADCs in A Multi-Lane Coherent Receiver.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2014
Selection of optimal electronic toll collection system for India: A subjective-fuzzy decision making approach.
Appl. Soft Comput., 2014

2012
A sub-2W 10GBase-T analog front-end in 40nm CMOS process.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012


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