Saurabh Kotiyal
Orcid: 0009-0005-2143-2763
According to our database1,
Saurabh Kotiyal
authored at least 11 papers
between 2005 and 2016.
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Bibliography
2016
J. Circuits Syst. Comput., 2016
2015
Reversible logic based multiplication computing unit using binary tree data structure.
J. Supercomput., 2015
2014
Proceedings of the Field-Coupled Nanocomputing - Paradigms, Progress, and Perspectives, 2014
Trans. Comput. Sci., 2014
Microelectron. J., 2014
Circuit for Reversible Quantum Multiplier Based on Binary Tree Optimizing Ancilla and Garbage Bits.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
2013
IEEE Trans. Very Large Scale Integr. Syst., 2013
2012
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
2005
VLSI Implementation of O(n*n) Sorting Algorithms And Their Hardware Comparison.
Proceedings of The 2005 International Conference on Scientific Computing, 2005