Saurabh Khandelwal
Orcid: 0000-0001-7992-3390
According to our database1,
Saurabh Khandelwal
authored at least 14 papers
between 2012 and 2024.
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Bibliography
2024
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2024
2022
Yield Evaluation of Faulty Memristive Crossbar Array-based Neural Networks with Repairability.
Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022
2021
A Memristive Architecture for Process Variation Aware Gas Sensing and Logic Operations.
Proceedings of the 27th IEEE International Symposium on On-Line Testing and Robust System Design, 2021
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021
2020
Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
2019
The Missing Applications Found: Robust Design Techniques and Novel Uses of Memristors.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
2018
45nm Bit-Interleaving Differential 10T Low Leakage FinFET Based SRAM with Column-Wise Write Access Control.
Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018
2016
FinFET Design Considerations Based on Schmitt Trigger with Slew Rate and Gain-Bandwidth Product Analysis.
Wirel. Pers. Commun., 2016
2015
Modeling and Optimization of Nano-Scale Sensing Shorted Gate FinFET D Flip-Flop Using AVL.
J. Low Power Electron., 2015
2012
Analyzing Different Mode FinFET Based Memory cell at different power supply for Leakage Reduction.
Proceedings of Seventh International Conference on Bio-Inspired Computing: Theories and Applications (BIC-TA 2012), 2012