Satyajit Das

Orcid: 0000-0002-7550-2641

According to our database1, Satyajit Das authored at least 35 papers between 2014 and 2024.

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Bibliography

2024
CREPE: Concurrent Reverse-Modulo-Scheduling and Placement for CGRAs.
IEEE Trans. Parallel Distributed Syst., July, 2024

A Noise Covariance Regulated Robust Modified Adaptive Extended Kalman Filter for State of Charge Estimation of Lithium-Ion Battery.
IEEE Access, 2024

Efficient FFT-Based CNN Acceleration with Intra-Patch Parallelization and Flex-Stationary Dataflow.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

ByteZip: Efficient Lossless Compression for Structured Byte Streams Using DNNs.
Proceedings of the International Joint Conference on Neural Networks, 2024

A Novel Inductive Sensor For Simultaneous Linear and Angular Displacement Measurement.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2024

SplitMS: Split Modulo-Scheduling for Accelerating Loops Onto CGRAs.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024

Standalone Nested Loop Acceleration on CGRAs for Signal Processing Applications.
Proceedings of the Design and Architectures for Signal and Image Processing, 2024

Spectral-Blaze: A High-Performance FFT-Based CNN Accelerator.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2024

2023
An Efficient and Flexible Stochastic CGRA Mapping Approach.
ACM Trans. Embed. Comput. Syst., 2023

Weight computation of criteria in a decision-making problem by entropy measure under interval-valued fuzzy environment.
Int. J. Math. Oper. Res., 2023

Energy Efficient DNN Compaction for Edge Deployment.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023

2022
Energy Efficient Hardware Loop Based Optimization for CGRAs.
J. Signal Process. Syst., 2022

Reinforcement Learning based Efficient Mapping of DNN Models onto Accelerators.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022

2021
Floating Point CGRA based Ultra-Low Power DSP Accelerator.
J. Signal Process. Syst., 2021

Hardware Based Loop Optimization for CGRA Architectures.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2021

2020
Fast and Efficient Decision-Based Attack for Deep Neural Network on Edge.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2020

Energy Efficient Acceleration Of Floating Point Applications Onto CGRA.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation Flow for Near-Sensor Ultralow Power Processing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Attribute weight computation in a decision making problem by particle swarm optimization.
Neural Comput. Appl., 2019

On the orness of Bonferroni mean and its variants.
Int. J. Intell. Syst., 2019

Context-memory Aware Mapping for Energy Efficient Acceleration with CGRAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Architecture and Programming Model Support For Reconfigurable Accelerators in Multi-Core EmbeddedSystems. (Architecture et modèle de programmation pour accélérateurs reconfigurables dans les systèmesembarqués multi-cœurs).
PhD thesis, 2018

Information Measures in the Intuitionistic Fuzzy Framework and Their Relationships.
IEEE Trans. Fuzzy Syst., 2018

A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Extended Bonferroni Mean Under Intuitionistic Fuzzy Environment Based on a Strict t-Conorm.
IEEE Trans. Syst. Man Cybern. Syst., 2017

Similarity measure of intuitionistic fuzzy numbers and its application to clustering.
Int. J. Math. Oper. Res., 2017

A 142MOPS/mW integrated programmable array accelerator for smart visual processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Efficient mapping of CDFG onto coarse-grained reconfigurable array architectures.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Weight computation of criteria in a decision-making problem by knowledge measure with intuitionistic fuzzy set and interval-valued intuitionistic fuzzy set.
Soft Comput., 2016

Medical diagnosis with the aid of using fuzzy logic and intuitionistic fuzzy logic.
Appl. Intell., 2016

A Scalable Design Approach to Efficiently Map Applications on CGRAs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2014
A Fault Based Attack on MDS-AES.
Int. J. Netw. Secur., 2014

Weight Computation of Alternatives in a Decision-Making Problem by Preference Relation.
Proceedings of Fourth International Conference on Soft Computing for Problem Solving, 2014

Remote cache-timing attacks against AES.
Proceedings of the First Workshop on Cryptography and Security in Computing Systems, 2014


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